Sliding mode control (SMC) is recognized as robust controller with a high stability in wide range of operating conditions, although it suffers from chattering problem. In addition, cannot be directly applied to multiswitches power converters. this paper, performance and fixed switching frequency sliding proposed for single-phase unipolar inverter. The problem SMC eliminated by smoothing the law narrow boundary layer, pulsewidth modulator produces procedure based on limitation modulator....

The low-frequency current ripple that always appears at the input of single-phase DC/AC inverters decreases lifetime DC voltage sources, such as fuel cells and chemical batteries. In this study, based on series parallel feedback theory, a proportional-integral (PI) controller is designed for front-end boost converter in two-stage power converters. This increases output impedance converter, which reduces converter. Since corrupts dynamic response DC-link severely over/undershoots step load...

Loss is a very important parameter in the analysis of power electronic systems, and accurate calculation this directly effects on economic technical evaluation. Junction temperature, heat-sink sizing cooling system, failure rate MTTF <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sup> are some examples basic parameters designing multilevel inverter, which all depends loss. Through previous methods, loss equations were general results limited...

Owing to the low voltage level that renewable energy sources like solar panels frequently provide, and limited capability of simple boost converter, need for high gain step-up dc-to-dc converters are increased. In this article a single switch topology with efficiency is developed. To obtain gain, described employs three windings coupled inductor multiplier cell method. get innovative converter does not require work at duty cycle state by increasing turns ratio inductor. The suggested...

ABSTRACT This paper introduces a new static random‐access memory (SRAM) cell, the Differential Virtual Ground (VGND) 10 T (Dvgnd10T), designed for superior performance. By employing configuration that consistently maintains VGND voltage below threshold of an NMOS transistor, this approach minimizes power consumption and eliminates risk half‐select disturbance during near‐threshold operation. Additionally, integration cut‐off supply technique significantly improves writability cell....

Regarding the spin field effect transistor (spin FET) challenges such as mismatch in injection and insufficient life time, we propose a silicene based device which can be promising candidate to overcome some of those problems. Using non-equilibrium Green's function method, investigate spin-dependent conductance zigzag nanoribbon connected two magnetized leads are supposed either parallel or anti-parallel configurations. For both configurations, controllable current obtained when Rashba is...

In this paper, a modified H-bridge 5-level inverter has been proposed. The the lower number of switches than similar structures, and feature causes low implementation cost. A passive LC filter is designed to decrease THDV, simulation results prove that THDV value decreased, significantly. As well, high switching frequency versus power dissipation another important proposed inverter. verification system for 9-kVA prototype demonstrated successfully using MATLAB/Simulink. Also, 3-kVA built...

Multilevel inverters due to adequate cost, simple implementation and high efficiency are very useful in modern drives other medium power utilities. In this study, a new switched-capacitor multilevel inverter (SCMLI) topology is presented which can be used applications with minimum count. Proposed SCMLI consists of several capacitors beside series/parallel switches diodes that pass the reverse current for inductive loads. case, voltage all balanced by using proposed SPWM modulation technique...

In this paper, we present the design of a fully integrated CMOS low noise amplifier (LNA) with on-chip spiral inductors in 0.18 μm technology for 2.4 GHz frequency range. Using cascode configuration, lower power consumption higher voltage and gain are achieved. managed to have good trade off among noise, high gain, stability. common-gate (CG) reduced parasitic effects Cgd therefore alleviated stability linearity amplifier. This configuration provides more reverse isolation that is also...

In this paper we present a fully integrated current reuse CMOS LNA (low noise amplifier) with modified input matching circuitry and inductive inter-stage architecture in 0.18 μm technology. To reduce the large spiral inductors that actually require larger surface area for their fabrication, two parallel LC circuits are used small on-chip inductors. Using cascode configuration equipped by LCs, achieved lower power consumption higher gain. cascoded transistors to have good output swing...

In this paper a design for Standard Quaternary Inverter (SQI) in Carbon Nanotube Field-Effect-Transistor (CNFET) technology is proposed. The proposed evaluated and compared with well-known designs. Therefore, several figures of merit (FOM) including maximum delay time, power consumption, Power-Delay-Product (PDP), count utilized CNFETs area occupation have been derived. Based on the simulation results HSpice standard 32 ​nm CNFET Stanford model, SQI superior terms consumption PDP over other...

Due to the internal losses of fuel cells, its load regulation is not better than 30% from no full conditions. To increase utilization cell, this paper proposed a two switch buck-boost converter with simple current mode controller. This structure performs conversion lower stresses single types. In approach problem interference between buck and boost switches performance are solved by determining four operation modes for converter. The experimental results an 110 V, 40 KW show ability control...

A new switched-capacitor multilevel inverter (SCMLI) topology for grid-connected photovoltaic (PV) systems with eliminating the leakage current is presented in this study. Due to directly connecting negative pole of PV cells neutral line grid, will be decreased zero. The newest topologies SCMLI are based on H-bridge stage; that means common mode voltage output variable and leads current. main advantages are: (1) It does not need boost thus, it has light weight small size. (2) connected so...

This letter presents an inverse class-F power amplifier (PA) where the second-harmonic voltage produced by nonlinear gate–source capacitor ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$C_{\text {GS}}$ </tex-math></inline-formula> ) of gallium nitride (GaN) HEMT transistor improves PAE and output power. The design is based on multiharmonic recursive source-pull (SP) load-pull (LP) simulations to...

A new voltage controlled oscillator (VCO) in a 0.18 μm CMOS process is offered this paper. This paper׳s argument to provide an innovative approach improve the phase noise which one of most controversial issues VCOs. Contrary ideas that have been put forward decrease are based on higher current dissipation increase output swing, method offers better specifications with respect traditional solutions. The presented circuit capable extra oscillation amplitude without increasing level, taking...

This article presents a nonisolated bidirectional converter (BDC) with high voltage conversion ratio. The structure of winding-cross-coupled-inductors (WCCIs) is developed in the two-phase interleaved BDC to achieve excellent features current-ripple-cancellation, current sharing, and voltage-gain. Furthermore, proposed topology uses two active passive clamp circuits recover coupled inductors’ leakage energy maintain overall efficiency at level providing zero switching (ZVS) boost mode. A...

This paper proposes a very low-power discrete-time delta-sigma modulator (DTDSM) for the wireless body area network (WBAN) which deals with biomedical signals. The first stage integrator is optimized using correlated double sampling technique and implemented high-gain designed telescopic operational transconductance amplifier (OTA) in order to maintain proposed second-order DTDSM high resolution. In keep both integrators active prevent ENOB loss, low power two-stage charge-steering employed...