Abstract RDMA communication can be a good solution for many use cases, such as in data acquisition systems and any other system requiring high bandwidth low latency. Multiple options an RDMA-based have already been tested, profiling based on message size count, using multiple simultaneous clients FPGA-based senders, or streaming over links software senders. Now, all of these are being put together supporting from link to one more new features added.

This article presents a configurable, high-throughput pseudo-random number generator template targeting cryptographic applications. The is parameterized using chaotic map that generates data, an entropy builder used to periodically change the parameters of and parameter interval, which iterations after will generator’s parameters. system implemented in C++ evaluated TestU01 NIST RNG statistical tests. same implementation for stream cipher can encrypt decrypt PNG images. A Monte-Carlo...

Abstract The FELIX system is used to interface the front-end electronics and commodity hardware in server farm of ATLAS experiment. using RDMA through RoCE transmit data from its host servers Software Readout Driver off-the-shelf networking equipment. In current version FELIX, communication implemented software on both ends links. Improvements throughput as part High Luminosity LHC upgrade, by implementing support FPGA, have been tested. A that uses FPGA implementation being proposed demonstrated.

Abstract RDMA communication is an efficient choice for many applications, such as data acquisition systems, center networking and any other application, where high bandwidth low latency are necessary. can be implemented using a large array of options, which need to tailored the needed use case, in order get optimal results. Aspects effects multiple simultaneous connections, various transport functions Write Send models sending individual bursts or continuous streams will investigated...

This paper describes the digital implementation of a chaos based cyptographic pseudo-random number generator using Zynq SoC, offloading computation to FPGA. The is on generalized Henon map, and it done fixed point 3.61 arithmetic. We will show that there performance improvement compared execution ARM Cortex A9 processor generated random bytes are consistent with software implementation. tested against NIST, Dieharder TestU01 suites.

Abstract The FELIX system is used as an interface between front-end electronics and commodity hardware in the server farm. using RDMA through RoCE to transmit data from its host servers software readout driver off-the-shelf networking equipment. communication implemented on both end of links. Exploring opportunities improve throughput part high luminosity LHC upgrade, implementation for support FPGA being developed. We present a proof-of-concept implementation, which will help inform design...

This paper describes a cryptographic pseudorandom number generator (PRNG) implemented using the evolution of chaotic Henon map. The PRNG is tested well established NIST statistical test suite. throughput will be analyzed by implementing it in C++ language, 64-bits and 128-bits floating point arithmentic as 3.61 fixed arithmetic. results, both suite analysis, show that robust suited for practical applications. code provided Git repository

This paper describes a cryptographic pseudorandom number generator (PRNG) implemented using the evolution of chaotic Henon map. The PRNG is tested well established NIST statistical test suite. throughput will be analyzed by implementing it in C++ language, 64-bits and 128-bits floating point arithmentic as 3.61 fixed arithmetic. results, both suite analysis, show that robust suited for practical applications. code provided Git repository

This paper presents a way of increasing overall performance in embedded processors by introducing multithreading interleaved execution model that can be applied to any Instruction Set Architecture. Usual acceleration techniques as superpipeline or branch prediction are not suited for machines due their inherent inefficiency. We will show removing dependencies within processor and thus eliminating the need extra hardware required keeping coherence, there noticeable increase (up 450%) also...

This paper presents the implementation of a heterogeneous Hadoop cluster based on Zynq ZedBoard development platform with GZIP FPGA offloading for high-speed and energy efficient computing. We have developed first open source compressor, designed educational research purposes, that can reach 1 Gbps compression speed using 125 MHz clock. The core uses only 10% Zynq-7020 SoC resources is 5.7x faster than ARM CPU which runs at 667 MHz. implemented an eight-node distributed performed Wordcount...

In this paper, we have attempted to resolve an important issue present in a previously proposed cryptographic pseudo-random number generator (pRNG), the being that for certain seeds values, behavior of system is not random. To solve problem, he added global control gathers entropy and periodically alters current internal state order prevent lack randomness output values. The new empirically tested with established test battery, NIST, as well through Monte-Carlo simulations. results show...

The computational structures are not able to scale following the increased number of components offered by technological development driven Moore's law. In order use efficiently emerging nanotechnologies new architectural approaches requested. Thus, technology architectures must be developed. proposed architecture is designed in this technologically evolving context, support increasing diversity, complexity and intensity requested emergent domain parallel embedded computing. resulting...

In the context of current struggle for information security and computational efficacy, this paper studies Baptista's chaos-based encryption cipher as a resource-efficient alternative to more popular block algorithms. We evaluate by encrypting different types data - text, images sound we present analysis cyphertext statistical distribution obfuscation characteristics. Simulation results illustrate effectiveness algorithm on multimedia content. an implementation digital system in Xilinx Zynq...

A previous work proposed a chaos-based private communication scheme. fourth order differentiator was used to estimate the dynamics of transmitter, when only one its states is measured at receiving end. The choice for parameters this estimator done empirically, evaluating errors between original and estimated evolution. This adds procedure genetic algorithm which allows an automatization decision regarding values enable best reconstruction.

Targeting the hybrid analog-digital private communication field, this paper aims to estimate parameters of an analog circuit model. An oscilloscope stores samples a voltage in a.csv file. The data series is processed using digital signal technique singular value decomposition. Singular values and corresponding right-eigenvectors are used estimated model characterizing that produced measured output. decomposition performed small windows output jerk-type from literature averaging operation...

This paper presents a software FPGA board simulator having Xilinx's Vivado toolchain as backend. It offers GUI interface to basic components such LEDs, buttons, and switches, may be configured run with virtually any without recompilation, which is very useful teaching/self-teaching/training tool. Both combinational sequential circuits are supported if described in Verilog HDL. Their output shown on the proposed environment resembling various specific boards, not just waveforms usual digital...

RDMA (Remote Direct Memory Access) is used by the ATLAS experiment at CERN in new readout system based on FELIX (Front-End Link eXchange) for its networking layer. The to interface front-end electronics commodity hardware server farm. In current implementation of FELIX, communication implemented using software both ends links. through RoCE (RDMA over Converged Ethernet) transmit data from servers Software Readout Driver devices farm off-the-shelf equipment. As a consequence High Luminosity...