Passive <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">RC</i> polyphase filters (PPFs) are analyzed in detail this paper. First, a method to calculate the output signals of an xmlns:xlink="http://www.w3.org/1999/xlink">n</i> -stage PPF is presented. As result, all relevant properties PPFs, such as amplitude and phase imbalance loss, calculated. The rules for optimal pole frequency planning maximize image-reject ratio provided by given. loss...

This paper describes a receiver designed to meet the stringent power consumption requirements for sensor radio, which operates at 2.4-GHz ISM band with Bluetooth. To enable reusability of Bluetooth system, only slight changes are made in radio parameters. The symbol rate is decreased and increased modulation index removes energy maximum from channel center, enables low-complexity direct-conversion solution. speed requirements, this fabricated 0.13-/spl mu/m CMOS process. 3.4-mW demonstrator...

A fast frequency-hopping six-band local oscillator signal generator is described in this paper. Targeted for a Wi-Media ultra-wideband radio transceiver, it offers operation mandatory band group 1 and extensional 3. The circuit entity consists of three parallel phase-locked loops (PLLs), each including two voltage-controlled oscillators, one per group, multiplexer frequency selection. broadband poly-phase <i xmlns:mml="http://www.w3.org/1998/Math/MathML"...

A direct conversion RF front-end for 2.0 GHz WCDMA and 5.8 WLAN applications is described. The measured double-sideband NF, IIP3 voltage gain are 3.6 dB, -15.1 dBm 29.5 dB WCDMA, 5.2 -17.4 26.5 WLAN, respectively. consumes 22.3 mA in mode 23.1 from a 2.7 V supply. chip fabricated using 0.35 /spl mu/m 45 SiGe BiCMOS process.

This paper describes a direct-conversion RF front-end designed for dual-band WiMedia UWB receiver. The operates in band groups BG1 and BG3. It includes multi-stage LNAs, down-conversion mixers, polyphase filter quadrature local oscillator (LO) signal generation, LO buffers. As targeted mobile handset, several issues related to hostile environment are taken into account this design. achieves approximately 26-dB gain 4.9 5.6-dB noise figure (NF) across three subbands of BG1. In BG3 mode it...

Abstract The design of a common‐gate (CG) LNA for the wideband applications is discussed in this paper. effect different components matching network analyzed detail. input and output signal current stage presented. In addition, on linearity noise CG studied. A example given to demonstrate effectiveness presented theory. Copyright © 2008 John Wiley &amp; Sons, Ltd.

A single-chip dual-mode direct-conversion RF receiver with an improved method for increasing the IIP2 of downconversion mixer is described. An over 2-MHz baseband channel achieved. The 0.35-/spl mu/m SiGe BiCMOS achieves 3.2-dB NF and -13-dBm IIP3 in 2-GHz mode, 7.4-dB -17-dBm 5-GHz mode. current consumption mode 29.6 mA 28.4 mA. chip area 5.1 mm/sup 2/.

A low-noise amplifier design for the wideband applications is discussed in this paper. typical inductively degenerated common source (IDCS) LNA optimal narrowband systems with reception band of few hundred MHz. However, ultrawideband multiple GHz bandwidth set new requirements LNA. In paper usability IDCS topology UWB system studied. Different possibilities to enhance without using extra inductors are analyzed and compared

The design of a common-gate LNA for the wideband applications is discussed in this paper. First, effect different components matching network analyzed detail. This followed by input and output signal current stage. A example given to demonstrate effectiveness presented theory.

In this paper, a 3.4-mW direct-conversion receiver, operating at 2.4 GHz, is presented. The receiver includes merged low-noise amplifier and quadrature mixers, local oscillator buffers, one analog baseband channel. 0.13-/spl mu/m CMOS consumes 2.75 mA from 1.2-V supply. achieves 47-dB voltage gain, 28-dB NF, -21-dBm IIP3, +18-dBm IIP2.

This paper describes the analysis of different feedback topologies to LNA input matching. The effect components impedance is discussed. Analyzed can also be used eliminate source inductor found in IDCS and achieve matching packaged where bond wire no longer a free design parameter. A example, using 1.2-V 65-nm CMOS process, given for demonstrate that adequate performance achieved presented theory topologies.

A 2.4-GHz direct-conversion RF front-end designed in a 65-nm CMOS process is described this paper. The includes an LNA, folded quadrature mixers, local oscillator (LO) divider, and LO buffers. consumes 29.3 mA from 1.2-V power supply according to simulations it achieves 39-dB voltage gain, 1.5-dB minimum spot noise figure, -17-dBm IIP3

A 2-GHz low noise amplifier (LNA) with optional dual bias feed (DBF) linearization circuit was studied and implemented. The operation of the DBF is described in detail an analytical formula for extra base current supplied by derived this paper. Simulation results show that improves ICP IIP3 6.5 dB 7 dB, respectively. fabricated using a 0.35-/spl mu/m 45-GHz f/sub T/ SiGe BiCMOS technology.

A direct-conversion receiver for a 2.4-GHz sensor network is described. The designed to operate in Bluetooth system where slight changes are made the radio parameters meet low power requirement. includes an LNA, downconversion mixers, 90-degree phase shift circuit, analog filters, 1-bit analog-to-digital converter, and received signal strength indicator (RSSI). consumes 4.1 mA from 1.2-V supply it achieves 43-dB voltage gain, 25-dB noise figure, -22-dBm IIP3, +11-dBm IIP2.