A5088697502- 2D Materials and Applications
- Semiconductor materials and devices
- Ferroelectric and Negative Capacitance Devices
- MXene and MAX Phase Materials
- Semiconductor materials and interfaces
- Advanced Memory and Neural Computing
- Graphene research and applications
- Copper Interconnects and Reliability
- Advancements in Semiconductor Devices and Circuit Design
- Nanowire Synthesis and Applications
- Cultural Heritage Materials Analysis
- Water Quality Monitoring and Analysis
- TiO2 Photocatalysis and Solar Cells
- Molecular Junctions and Nanostructures
- Advanced Photocatalysis Techniques
- Quantum Dots Synthesis And Properties
- Chalcogenide Semiconductor Thin Films
- Machine Learning in Materials Science
- Topological Materials and Phenomena
The University of Texas at Dallas
2018-2020
Pennsylvania State University
2020
Millennium Engineering and Integration (United States)
2020
Oregon State University
2020
Two-dimensional transitional metal dichalcogenide (TMD) field-effect transistors (FETs) are promising candidates for future electronic applications, owing to their excellent transport properties and potential ultimate device scaling. However, it is widely acknowledged that substantial contact resistance associated with the contact-TMD interface has impeded performance a large extent. It been discovered O2 plasma treatment can convert WSe2 into WO3-x substantially improve resistances of...
Border traps and interface in HfO2/few-layer MoS2 top-gate stacks are investigated by C–V characterization. Frequency dependent data shows dispersion both the depletion accumulation regions for devices. The border trap density is extracted with a distributed model, analyzed using high-low frequency multi-frequency methods. physical origins of appear to be caused impurities/defects layers, performing as band tail states, while associated dielectric, likely consequence low-temperature...
High quality sub-10 nm high-k dielectrics are deposited on top of MoS2 and evaluated using a dual-gate field effect transistor configuration. Comparison between top-gate HfO2 an Al2O3/HfO2 bilayer shows significant improvement in device performance due to the insertion thin Al2O3 layer. The results show that buffer layer improves interface by effectively reducing net fixed positive oxide charge at MoS2/high-k dielectric interface. Dual-gate sweeping, where both back-gate swept...
The benefits of O2 plasma exposure at the contact regions dual-gate MoS2 transistors prior to metal deposition for high performance electron contacts are studied and evaluated. Comparisons between devices with without demonstrate significant improvements due formation a high-quality interface low Schottky barrier (∼0.1 eV). Topographical interfacial characterizations used study on from initial exfoliated surface through photolithography process Ti deposition. Fermi level pinning near...
The interconnect half-pitch size will reach ≈20 nm in the coming sub-5 technology node. Meanwhile, TaN/Ta (barrier/liner) bilayer stack has to be >4 ensure acceptable liner and diffusion barrier properties. Since occupy a significant portion of cross-section they are much more resistive than Cu, effective conductance an ultrascaled compromised by thick bilayer. Therefore, 2D layered materials have been explored as alternatives. However, many proposed barriers prepared at too high...
Molybdenum disulfide, a two-dimensional transition metal dichalcogenide, was analyzed using in situ x-ray photoelectron spectroscopy (XPS). The XPS spectra obtained from fresh surface which exfoliated and annealed ultrahigh vacuum include survey scan, high resolution of O 1s, C Mo 3d, S 2s, 2p, 3p, 4p, 3s, the valence band. Quantitative analysis indicates sulfur deficient composition MoS1.8, impurities were below detection limit.
Covalent p-type doping of WSe2 thin films grown by molecular beam epitaxy and exfoliated from bulk crystals is achieved via remote nitrogen plasma exposure. X-ray photoelectron Raman spectroscopies indicate covalently bonded in the lattice as well tunable concentration with N2 exposure time. Furthermore, incorporation induces compressive strain on after Finally, atomic force microscopy scanning tunneling reveal that treatment needs to be carefully tuned avoid any unwanted or surface damage.
Top-gated, few-layer MoS2 transistors with HfO2 (6 nm)/Al2O3 (3 nm) gate dielectric stacks are fabricated and electrically characterized by capacitance–voltage (C–V) measurements to study active traps (Dit) in the vicinity of Al2O3/MoS2 interface. Devices low Dit high both observed C–V characterization, impact H2/N2 forming gas annealing at 300 400 °C on density distribution is studied. A anneal able reduce significantly, while increases defects stack. Simulation modeled suggests a sizable...
We report an excellent growth behavior of a high-κ dielectric on ReS2, two-dimensional (2D) transition metal dichalcogenide (TMD). The atomic layer deposition (ALD) Al2O3 thin film the UV-Ozone pretreated surface ReS2 yields pinhole free and conformal growth. In-situ half-cycle X-ray photoelectron spectroscopy (XPS) was used to monitor interfacial chemistry ex-situ force microscopy (AFM) evaluate morphology. A significant enhancement in uniformity deposited via plasma-enhanced (PEALD), while...
Direct evidence of O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -plasma induced contact metal Fermi-level realignment is observed in WSe based SB field-effect transistors (FETs), leading to high hole currents with on/off ratios >10 <sup xmlns:xlink="http://www.w3.org/1999/xlink">8</sup> . The formation tungsten oxide (WO xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> ) converted from top layers not only serves as an effective...
In this work, few-layer MoS2 FET-based devices were fabricated using top and bottom high-k dielectrics (Al2O3 and/or HfO2). Frequency-dependent C-V data of top-gate FETs shows dispersion in both the depletion accumulation regions for signifying electrically active interface possible border traps. Also, metal contact deposition conditions sulfur treatments on source drain determined that ultra high vacuum deposited metals superior to those only under vacuum, treatment coupled with a forming...
Bismuth selenide (Bi2Se3), a two-dimensional topological insulator material purchased from Alfa Aesar, was analyzed using in situ x-ray photoelectron spectroscopy (XPS). The XPS spectra obtained fresh surface exfoliated ultrahigh vacuum include survey scan, high resolution of O 1s, Bi 5d, Se 3d, 4f, 3p, LMM, C and the valence band. Quantitative analysis indicates deficient composition Bi2Se2.8, which is consistent with Fermi level position conduction band detected this work.
Transition metal dichalcogenides (TMDs) as 2D or few-layer semiconducting channel material are being widely studied to lower power consumption and obtain negligible short effects with continued transistor scaling [1-4]. Meanwhile, research needs be conducted on top-gated, metal-oxide-semiconductor field effect transistors (MOSFETs) correctly assess the possibility of TMDs supplanting silicon in region. This is because top-gate device architectures face some key integration challenges that...
High-k encapsulated MoS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> field-effect-transistors were fabricated and electrically characterized. Comparison between HfO Al O xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> FETs their I-V response to execution time are shown. Changes in gate voltage step integration demonstrate that electrical characterization parameters can significantly impact device such as the subthreshold swing...
The influence of the fabrication process on electrical performance ZnO and MoS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> devices are evaluated due to their promise for future internet things technology applications beyond silicon. Low temperature processing gate dielectrics introduce new challenges in obtaining optimal device performance. HfO Al O xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> or semiconducting layers...
The interconnect half-pitch size will reach ~20 nm in the coming sub-5 technology node. Meanwhile, TaN/Ta (barrier/liner) bilayer stack has to be > 4 ensure acceptable liner and diffusion barrier properties. Since occupy a significant portion of cross-section they are much more resistive than Cu, effective conductance an ultra-scaled compromised by thick bilayer. Therefore, two dimensional (2D) layered materials have been explored as alternatives. However, many proposed 2D barriers prepared...