Van-Nhan Nguyen

ORCID: 0000-0002-0321-9425
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About
Contact & Profiles
Research Areas
  • Analog and Mixed-Signal Circuit Design
  • Advancements in PLL and VCO Technologies
  • Corrosion Behavior and Inhibition
  • Photonic and Optical Devices
  • Silicone and Siloxane Chemistry
  • Analytical Chemistry and Sensors
  • Network Security and Intrusion Detection
  • Advanced Malware Detection Techniques
  • Polymer Nanocomposites and Properties
  • CCD and CMOS Imaging Sensors
  • Neuroscience and Neural Engineering
  • Advanced Optical Sensing Technologies
  • Internet Traffic Analysis and Secure E-voting
  • Concrete Corrosion and Durability
  • Conducting polymers and applications
  • Energy Harvesting in Wireless Networks
  • Intermetallics and Advanced Alloy Properties
  • Quantum Computing Algorithms and Architecture
  • Photovoltaic System Optimization Techniques
  • Advanced Fiber Optic Sensors
  • IPv6, Mobility, Handover, Networks, Security
  • Fuel Cells and Related Materials
  • Aerogels and thermal insulation
  • Magneto-Optical Properties and Applications
  • Semiconductor materials and devices

Hanoi University of Science and Technology
2024

Kyung Hee University
2015-2023

Vietnam Posts and Telecommunications Group (Vietnam)
2022-2023

Posts and Telecommunications Institute of Technology
2022-2023

University College Dublin
2019

Université de Lille
2010

Université de Toulon
2002-2005

Laboratoire de Chimie
2002-2005

10.1023/a:1026081100860 article EN Journal of Sol-Gel Science and Technology 2003-01-01

This paper presents two designs of a capacitively-coupled chopper instrumentation amplifier (CCIA) successfully implemented in 28 nm CMOS for biopotential sensing applications. The first design is compact CCIA using offset-blocking chopping ripple reduction, DC servo loop (DSL) electrode offset ( V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">EOS</sub> ) suppression, and high pass filter (HPF) handling common-mode (CM) artifacts. An...

10.1109/access.2021.3087737 article EN cc-by IEEE Access 2021-01-01

Herein, we present a cyclic Vernier time-to-digital converter (TDC) using stage-gated ring oscillator (SGRO) and data-weighted averaging (DWA) dynamic element matching (DEM). Using the phase-preserving characteristic of SGRO, DEM is realized simple enable switches. DWA achieved by storing SGRO's previous state it as beginning next conversion. This approach achieves selection signal propagation paths in systematic mismatch averaged out through multiple conversions. first-order correction,...

10.1109/tim.2022.3151161 article EN IEEE Transactions on Instrumentation and Measurement 2022-01-01

Herein, we present a low-power cyclic Vernier two-step time-to-digital converter (TDC) that achieves wide input range with good linearity. Since traditional approaches require large area or high power to achieve an &gt;300 ns, solve this problem by proposing simple yet efficient TDC suitable for time-of-flight (TOF) sensors. In previous studies using the structure, effect of startup time on linearity is not described. Thus, achievable has been limited when used applications requiring range....

10.3390/s18113948 article EN cc-by Sensors 2018-11-15

With the continuous growth of Internet Things applications, increasingly sophisticated and malicious network security attacks have been posing new requirements. One first protection solutions to ensure is use an intrusion detection system (IDS) for detecting cyberattacks. Another hand, edge computing technology has bringing many benefits communication infrastructure IoT applications in terms performance privacy. However, implementation IDS systems on devices encounters obstacles stemming...

10.1109/atc55345.2022.9943049 article EN 2022-10-20

To realize an ultralow-power, low-noise amplifier for bio-potential recording, we investigate three design techniques. The first technique uses a noise-efficient squeezed inverter (SQI) stage biased at the supply of 2V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> DSAT</sub> saturation limit. challenge interfacing SQI with such low is addressed by proposing new capacitively-coupled chopper instrumentation (CCIA) DC servo loop (L-DSL) and...

10.1109/tcsii.2020.3045491 article EN IEEE Transactions on Circuits & Systems II Express Briefs 2020-12-17

Herein, we present a cyclic Vernier time-to-digital converter (TDC) using pulse-shrinking inverter-assisted residue quantizer (IRQ). Previous techniques suffer from nonuniform shrink rate and time offset that slows the conversion increases power consumption. The proposed IRQ reduces difference between signals instead of shrinking pulse width. This approach achieves high resolution with low consumption rate. critical tradeoff dynamic range (DR) is addressed three-step approach: coarse, fine,...

10.1109/tim.2021.3094244 article EN IEEE Transactions on Instrumentation and Measurement 2021-01-01

Abstract Summary: In this research, poly[(methyl methacrylate)‐ co ‐(butyl ‐(methacrylic acid)]/TiO 2 hybrids were prepared by the sol‐gel process. The copolymer composition was 16 mol‐% methyl methacrylate (MMA), 80 butyl (BMA) and 4 methacrylic acid (MA). dielectric properties of with varying titania content measured over frequency range 0.1 Hz to 100 kHz between 25 160 °C. addition, investigated using differential scanning calorimetry (DSC) dynamic mechanical thermal analysis (DMTA)....

10.1002/macp.200500016 article EN Macromolecular Chemistry and Physics 2005-07-18

Herein, we present a recirculating (RC) cyclic Vernier time-to-digital converter (TDC) using dynamic element matching and register-based time amplifier (TA). The RC TDC reuses single conversion stage for multiple conversions that are suitable low power compact realization. Good is achieved between because the same reused. Processing amplified residue further enhances resolution. We propose new TA based on register achieves well-controlled magnification over wide input range. Unlike...

10.1109/tim.2023.3240218 article EN IEEE Transactions on Instrumentation and Measurement 2023-01-01

EPCglobal recently announced the revised Gen2 standard - called version 2. Gen2v2 includes several new security and file management features to fit various possible application requirements. Inspired by these features, we propose a protocol with mutual authentication data cryptographic mechanism between reader tag for UHF passive RFID system. The verilog core was tested using FPGA chip fabricated in 0.18 μm 1-poly 6-metal CMOS process.

10.1109/isocc.2015.7401719 article EN 2015-11-01

Abstract Quantum compilation is the process of converting a target unitary operation into trainable represented by quantum circuit. It has wide range applications, including gate optimization, quantum-assisted compiling, state preparation, and dynamic simulation. Traditional usually optimizes circuits for single target. However, many systems require simultaneous optimization multiple targets, such as thermal time-dependent simulation, others. To address this, we develop multi-target...

10.1088/2632-2153/ad9705 article EN cc-by Machine Learning Science and Technology 2024-11-25

Abstract Titania‐poly(methyl methacrylate‐co‐butyl methacrylate‐co‐methacrylic acid) hybrids prepared by a sol‐gel method were deposited dip coating on mild steel. Transparent and defect free coatings with titania content ranging between 0 12.7 wt.% have been prepared. Barrier properties dry adherence tested electrochemical impedance spectroscopy (EIS) the vertical pull‐off test, respectively. The test results suggest that titanium alkoxide precursor must intercede substrate/coating...

10.1002/maco.200303787 article EN Materials and Corrosion 2004-09-01

We present a low power, small area time-to-digital converter (TDC) based on Venier cyclic digital controlled oscillator (DCO) structure. The TDC is designed to be combined with an array of single photon avalanche diodes (SPAD) arranged in silicon photomultiplier (SiPM) architecture form fluorescence lifetime sensor. high dynamic range achieved by using two individual counters (coarse and fine) conversion steps. fabricated 0.18 μm CMOS process compact chip 0.23 × 0.12 mm <sup...

10.1109/sigtelcom.2018.8325773 article EN 2018-01-01

This paper investigates the performance of cyclic feedback-based Successive Approximation Time-to-Digital Converter (SA - TDC) with dynamic delay equalization aimed to improve its conversion speed. The converter architecture is studied through numerical and behavioral modelling simulations presenting relevant implementation details impact circuit non-idealities such as devices mismatch noise. A comprehensive investigation technique provides useful insights on nominal achievable (i.e....

10.1109/ebccsp.2019.8836859 article EN 2019-05-01

Abstract The sol–gel process was used to prepare organic/inorganic hybrids utilizing a terpolymer of n ‐butyl methacrylate, methyl and methacrylic acid as an organic phase titanium tetrabutoxide precursor the inorganic phase. Such hybrid materials may be interest primers for corrosion protection metal substrates. In absence electrochemical influence, which is usually provided by anticorrosive pigments in current protective coatings, barrier mechanism becomes one basic elements protecting...

10.1002/app.21736 article EN Journal of Applied Polymer Science 2005-04-20
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