This paper presents a piezoelectric energy harvesting circuit, which integrates Synchronized Switch Harvesting on Inductor (SSHI) circuit and an active rectifier. The major design challenge of the SSHI method is flipping capacitor voltage at optimal times. proposed inserts diode each resonant loop, ensures times eliminates need to tune switching time. diodes are also used as rectifier further simplify controller. key advantage simple controller, leads low power dissipation result in high...

This paper describes a 14-bit, 125 MS/s IF/RF sampling pipelined A/D converter (ADC) that is implemented in 0.35 <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$muhbox m$</tex> BiCMOS process. The ADC has sample-and-hold circuit integrated the first pipeline stage, which removes need for dedicated amplifier (i.e., "SHA-less"). It also buffer turned off during hold clock phases to save power. To accurately estimate and minimize jitter, new...

This brief presents an ultra low power IC design for piezoelectric (PE) energy harvesting, which integrates a maximum point tracking (MPPT) circuit and synchronized switch harvesting on inductor (SSHI) circuit. The proposed also has three different operation modes to extend the range of harvestable level generated by PE transducer. is designed in CMOS fabricated BiCMOS 0.25 μm technology with die size 2 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML"...

A Wilkinson power divider operating not only at one frequency f/sub 0/, but also its first harmonic 2f/sub 0/ is presented. This consists of two branches impedance transformer, each which sections 1/6-wave transmission-line with different characteristic impedance. The outputs are connected through a resistor, an inductor, and capacitor. All the features conventional divider, such as equal split, matching all ports, good isolation between output can be fulfilled simultaneously.

This paper presents a piezoelectric (PE) energy harvesting circuit, which integrates Synchronized Switch Harvesting on Inductor (SSHI) circuit and diode bridge rectifier. A typical SSHI cannot transfer the power from PE cantilever into load when rectified voltage is higher than certain voltage. The proposed addresses this problem. It uses two resonant loops for flipping capacitor in each half cycle. One loop typically used parallel scheme, other series scheme. hybrid using enables circuit’s...

Novel common-mode feedback circuits are proposed for use in pseudo-differential switched-capacitor circuits. They can be implemented by incorporating just four additional capacitors (and switches) an integrator, and only two a residue gain amplifier. The applicable to very low-voltage stages realized submicron CMOS processes.

This paper presents a multi-input piezoelectric (PE) energy harvesting circuit, which integrates Series Synchronized Switch Harvesting on Inductor (S-SSHI) and Voltage Doubler (VD). The proposed circuit uses the VD topology to reduce number of diodes used in resonant loop S-SSHI hence more power available for load. Besides, adopts parallel connection multiple different PE transducers, an inductor are re-used harvest energy. It improves inductor's utilization reduces complexity circuit. is...

The continued down scaling of submicron CMOS technology forces innovation practical and economical circuits that will tolerate reduced headroom (reduced power supply voltage) due to lowering the technology's maximum allowable voltage. Given relatively large threshold voltages with respect shrinking headroom, a group widely used analog signal processing building blocks are made switched-capacitor (SC) stages encounter severe overdrive problems when operating at these low-voltage conditions....

In this letter, a direct AC-DC converter for piezoelectric (PE) energy harvesting is proposed, which integrates Synchronous Switch Harvesting on Inductor (SSHI) circuit, to achieve resistive impedance matching. An SSHI circuit intends deal with high of the PE transducer. Then, working in discontinuous conduction mode (DCM), relative switching frequency, delivers harvested into load. The self-powered and can start even if storage elements are completely drained. experimental results show that...

This paper describes a 14-bit, 125 MS/s IF/RF sampling pipelined A/D converter (ADC) that is implemented in 0.35 mum BiCMOS process. The ADC has an input switched buffer and 11 pipeline stages. sample-and-hold circuit integrated the first stage, which removes need for dedicated amplifier. Measured results on silicon indicate highest performance to date (in SNR, SFDR, DNL INL) at this sample rate over whole frequency range up 500 MHz. achieves of less than 0.2 LSB INL 0.5 LSB. SNR 75 dB below...

An idling scheme of Synchronous Switch Harvesting on Inductor (SSHI) is proposed for piling up output voltage the piezoelectric energy (PE) harvester cycle by cycle, to deal with PE harvester’s low voltage. The rectifier integrates active diodes and a parallel-SSHI technique simple control scheme, therefore has high efficiency. simulation results demonstrate feasibility rectifier, which able extract from ultra-low-voltage harvester.

In this paper, an LDMOS class-AB balanced power amplifier with a 3-dB bandwidth of 800 MHz at center frequency 2 GHz is presented. To the best authors' knowledge, largest reported so far these frequencies in technology. 50 Watt output power, high efficiency, linearity and input-and output-matching better than -10 dB have been achieved over large band. An advanced stability improvement introduced paper.

This paper presents an active rectifier, which aims to extract maximum power from piezoelectric generators for vibration energy harvesting. A nonlinear impedance matching scheme called Synchronized Switch Harvesting on Inductor (SSHI) is highly effective [1]. However, control of the internal capacitor flip timing complicated result in a complex controller or suboptimal timing. We proposed rectifier based series SSHI configuration [2]. It ensures optimal timing, yet simple dissipate low and...

A 2 GHz programmable-gain amplifier (PGA) using 0.12-/spl mu/m CMOS technology is presented in this paper, which has a 51 dB gain control range with 3 steps. The maximum output power of PGA achieves 9 dBm while the 1-dB compression point located at 8 dBm. high linearity denoted by oIP3 22 been achieved. new configuration to digitally implement dB-linear characteristic demonstrated simultaneously enables adaptive consumption.

The traditional SSHI circuit forms a resonant loop to salvage the charges that would otherwise be wasted. However, quality factor of low. This brief presents triple-bias parallel rectifier, which can effectively enhance power extraction capability from piezoelectric (PE) transducer. has low complexity and is easy integrate, convert original one voltage flipping into triple per half cycle, thereby improving ratio for factor. experimental results show that, compared circuit, obtained by load...

This paper presents a piezoelectric energy harvesting circuit, which integrates Synchronized Switch Harvesting on Capacitors (SSHC) and an active rectifier. An SSHC circuit does not require inductor for voltage flipping, hence is suitable on-chip implementation of the circuit. Existing circuits dedicated switch drivers, increases complexity to result in high power dissipation. The proposed addresses this problem through integration designed 0.35 μm CMOS technology. simulation results...

A K-band CMOS low-noise amplifier with a noise figure of 4.26 dB and peak gain 18.86 is presented. The has frequency 20.3 GHz an input referred 1 compression point −16 dBm. These are believed to be the lowest highest values reported date at these frequencies in standard technology.

This paper presents an adjustable-delay SSHC method to regulate the load for piezoelectric energy harvesting. The regulation usually requires a second-stage independent DC-DC converter. proposed circuit intends address problem. It adjusts pulse-width (i.e., delay in this paper) of switching pulse signal power flowing into load. has capability by using only one stage without inductor. operation and simulation results verified effectiveness method.

An all digital VSB demodulator for an HDTV receiver has been developed. The IC a tuner automatic gain control (AGC) circuit which controls the RF and IF in tuner. This paper presents some theoretical analysis of AGC on IC.

This paper presents a piezoelectric (PE) energy harvesting circuit based on the DSSH (double synchronized switch harvesting) principle. The consisted of rectifier and DC-DC circuit, which achieves double operation for PE transducer in each vibration half-cycle. One main challenges scheme was precisely controlling timing second loop resonant loops. proposed included MOS transistor to address this challenge. It utilized its threshold voltage manage stored intermediate capacitor per half-cycle...