A5060296317- Advanced Memory and Neural Computing
- Ferroelectric and Negative Capacitance Devices
- Neural Networks and Reservoir Computing
- Quantum and electron transport phenomena
- Physics of Superconductivity and Magnetism
- Semiconductor materials and devices
- Quantum Computing Algorithms and Architecture
- Cellular Automata and Applications
- Low-power high-performance VLSI design
- Advanced Semiconductor Detectors and Materials
- Advancements in Semiconductor Devices and Circuit Design
- Magnetic properties of thin films
- Analog and Mixed-Signal Circuit Design
- Neural Networks and Applications
- Topological Materials and Phenomena
- Advanced Data Storage Technologies
- Neural dynamics and brain function
- Electronic and Structural Properties of Oxides
- Semiconductor Quantum Structures and Devices
- CCD and CMOS Imaging Sensors
University of Tennessee at Knoxville
2022-2024
University of Tennessee System
2023
Abstract Realizing compact and scalable Ising machines that are compatible with CMOS-process technology is crucial to the effectiveness practicality of using such hardware platforms for accelerating computationally intractable problems. Besides need realizing spins, implementation coupling network, which describes spin interaction, also a potential bottleneck in scalability platforms. Therefore, this work, we propose an machine platform exploits novel behavior bi-stable CMOS-latches...
Cryogenic neuromorphic systems, inspired by the brains unparalleled efficiency, present a promising paradigm for next generation computing architectures.This work introduces fully integrated framework that combines superconducting memristor(SM) based spiking neurons and synapse topologies to achieve low power network with non volatile synaptic strength.This neurosynaptic is validated implementing cart pole control task, dynamic decision making problem requiring real time computation.Through...
The scaling of the already-matured CMOS technology is steadily approaching its physical limit, motivating quest for a suitable alternative. Cryogenic operation offers promising pathway towards continued improvement in computing speed and energy efficiency without aggressive scaling. However, memory wall bottleneck traditional von-Neumann architecture persists even at cryogenic temperature. That where compute-in-memory (CiM) architecture, that embeds within unit, comes into play. Computations...
Cryogenic (cryo) memory devices, designed to operate at/below 4 Kelvin (K) temperature, is a prime enabler of practical quantum computing systems, and superconducting (SC) electronic platforms (Figs. 1(a), (b)) [1]. The state-of-the-art algorithms require many arbitrary rotations which demand large store program instructions [2]. SC qubits (used in most the existing systems) are highly sensitive noise hence, protect qubit states from thermal disturbances, they placed at few milli-Kelvin (mK)...
Spiking neural network (SNN) has emerged as the most biologically accurate approach for information encoding in neuromorphic computing. Cryogenic hardware, which offers exceptional energy efficiency and speed, recently gained enormous attention among community. An to build such hardware is use a conductance asymmetric superconducting quantum interference device (CA-SQUID) that non-volatile variation- robust dual-resistive behavior thereby, referred memristor (SM). Here, we utilize this...
Cryogenic (cryo) memory blocks are envisioned to be crucial components for - (i) scalable quantum computing systems with> 1000 qubits [1], and (ii) superconducting (SC) single flux (SFQ) [2]. Decades of research has led a whole host cryo-memory variants (SC, non-SC, hybrid), more being actively explored. Despite having such massive interest in the search cryo-storage solutions, design possibilities compatible sense amplifiers (SA) remain largely unexplored. The existing approaches cryogenic...
We propose an artificial neuron topology that can be electronically reconfigured and dynamically tuned to alter its spiking rate ( <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$f_{SPIKE}$</tex> ). Our design employs two interacting cryogenic oscillators, both comprising a superconducting nanowire (ScNW) memristor (ScM). The ScMs programmed into resistive states through controlled current flow, collectively leading four combinations. proposed...
Mott memristor (MM)-based neuristors are promising candidates for artificial neuron implementations due to their scalability, energy efficiency, and CMOS-compatibility. A neuristor exhibits threshold-driven spiking under a voltage input diverse patterns constant current. The design principle of the relies on close match between two MMs, which is challenging ensure in practical designs. In this work, we perform simulation-driven comprehensive analysis identify possible effects parametric...
The revolution in artificial intelligence (AI) brings up an enormous storage and data processing requirement. Large power consumption hardware overhead have become the main challenges for building next-generation AI hardware. To mitigate this, Neuromorphic computing has drawn immense attention due to its excellent capability with very low consumption. While relentless research been underway years minimize neuromorphic hardware, we are still a long way off from reaching energy efficiency of...
Realizing compact and scalable Ising machines that are compatible with CMOS-process technology is crucial to the effectiveness practicality of using such hardware platforms for accelerating computationally intractable problems. Besides need realizing spins, implementation coupling network, which describes spin interaction, also a potential bottleneck in scalability platforms. Therefore, this work, we propose an machine platform exploits novel behavior bi-stable CMOS-latches (cross-coupled...
Neurons that fire multiple spikes on activation are commonly observed in biological systems, but the impact of their inclusion neuromorphic systems has not been thoroughly analyzed. In this preliminary work, we begin an initial evaluation multi-fire neurons classification and control task performance. We show networks with these evolved for tasks tend to perform worse than single-fire neurons; however, also significantly better when included reservoir computing approaches tasks.
Spiking neural network offers the most bio-realistic approach to mimic parallelism and compactness of human brain. A spiking neuron is central component an SNN which generates information-encoded spikes. We present a comprehensive design space analysis superconducting memristor (SM)-based electrically reconfigurable cryogenic neuron. nanowire (SNW) connected in parallel with SM function as dual-frequency oscillator two these oscillators can be coupled dynamically tunable The same topology...
Abstract Realizing compact and scalable Ising machines that are compatible with CMOS-process technology is crucial to the effectiveness practicality of using such hardware platforms for accelerating computationally intractable problems. Besides need realizing spins, implementation coupling network, which describes spin interaction, also a potential bottleneck in scalability platforms. Therefore, this work, we propose an machine platform exploits novel behavior bi-stable CMOS-latches...