A5051286450- Real-Time Systems Scheduling
- Embedded Systems Design Techniques
- Interconnection Networks and Systems
- Parallel Computing and Optimization Techniques
- Advanced Software Engineering Methodologies
- Distributed systems and fault tolerance
- Flexible and Reconfigurable Manufacturing Systems
- Formal Methods in Verification
- Distributed and Parallel Computing Systems
- Service-Oriented Architecture and Web Services
- Cloud Computing and Resource Management
- Software System Performance and Reliability
- Real-time simulation and control systems
- Safety Systems Engineering in Autonomy
- Model-Driven Software Engineering Techniques
- Supercapacitor Materials and Fabrication
- Manufacturing Process and Optimization
- Scheduling and Optimization Algorithms
- Petri Nets in System Modeling
- Software Reliability and Analysis Research
- Software Engineering Techniques and Practices
- IoT and Edge/Fog Computing
- Simulation Techniques and Applications
- Software Engineering Research
- Digital Transformation in Industry
KTH Royal Institute of Technology
2018-2024
Khyber Teaching Hospital
2021
Fraunhofer Institute for Mechatronic Systems Design
2016-2019
Embedded Systems (United States)
2018-2019
Mälardalen University
2014-2018
University of Modena and Reggio Emilia
2014
University of Pavia
2014
Scuola Superiore Sant'Anna
2014
Paderborn University
2013
Leibniz University Hannover
2010
Automotive embedded systems are subjected to stringent timing requirements that need be verified. One of the most complex requirement in these is data age constraint. This constraint specified on cause-effect chains and restricts maximum time for propagation through chain. Tasks a chain can have different activation patterns periods, introduce over- under-sampling effects, which additionally aggravate end-to-end analysis Furthermore, level information available at various development stages...
Today's automotive embedded systems comprise a multitude of functionalities, many with complex timing requirements. Besides task specific requirements, such applications often have requirements for the propagation data through chain tasks. An important metric control is age, which addressed in this paper. The analysis non-trivial because tasks involved may execute at different periods, leads to over and undersampling within one chain. This paper presents novel method compute worst-and...
Next generations of compute-intensive real-time applications in automotive systems will require more powerful computing platforms. One promising power-efficient solution for such is to use clustered many-core architectures. However, ensuring that requirements are satisfied the presence contention shared resources, as memories, remains an open issue. This work presents a novel contention-free execution framework execute on Privatization memory banks together with defined access phases...
This paper introduces UNICARagil, a collaborative project carried out by aconsortium of seven Germanuniversities and six industrial partners, withfunding providedby the Federal Ministry Education Research Germany. In scope thisproject,disruptive modular structures for agile, automatedvehicle concepts areresearched developed. Four prototypevehiclesof different characteristics based onthe same platform are going to be buildup over period four years. The fourfully automated driverless...
Self-adaptation allows continuously running software systems to operate in changing and uncertain contexts while meeting their requirements a broad range of contexts, e.g., from low high load situations. As consequence, for self-adaptive are more complex than static as they have explicitly address properties the self-adaptation layer. While approaches exist literature capture this new type formally, achievement cannot be analyzed early design phases yet. In paper, we apply RELAX formally...
Many industrial real-time systems rely on the implicit register communication paradigm to minimize overheads and ease distributed development. Here, tasks follow a simple input-processing-output scheme, data is passed without synchronization by last-is-best semantics. In these systems, age of primary objective, which defined data-flow chains that span from system's inputs outputs. Consequently, analysis aims provide guarantees worst-case age. general, there are two main approaches: (1)...
The PowerPC 601 microprocessor, the first of a family processors based on architecture, is described. general-purpose processor contains 32-Kb cache and superscalar machine organization that allows dispatch execution up to three instructions each clock cycle. bus interface storage control mechanisms can be configured for wide range system designs, from low-cost desktop personal computers high-performance multi-processor systems. organization, chip packaging technology, performance are...
Modern edge real-time automotive applications are becoming more complex, dynamic, and distributed, moving away from conventional static operating environments to support advanced driving assistance autonomous functionalities. This shift necessitates formulating complex task models represent the evolving nature of these aptly. Modeling systems is typically performed leveraging Architectural Languages (ALs) such as Amalthea, which commonly used by industry describe characteristics processing...
The complexity of automated driving poses challenges for providing safety assurance. Focusing on the architecting an Autonomous Driving Intelligence (ADI), i.e. computational intelligence, sensors and communication needed high levels driving, we investigate so called supervisors that complement nominal functionality. We present a problem formulation functional architecture fault-tolerant ADI encompasses supervisor channel. then discuss sources hazardous events, division responsibilities...
Many-core processors can provide the computational power required by future complex embedded systems. However, their adoption is not trivial, since several sources of interference on COTS many-core platforms have adverse effects resulting performance. One main source performance degradation contention Network-on-Chip (NoC), which used for communication among compute cores via off-chip memory. Available analysis techniques traversal time messages NoC do consider many architectural features...
Access to shared memory is one of the main challenges for many-core processors. One group scheduling strategies such platforms focuses on division tasks' access and code execution. This allows orchestrate local off-chip in a way that contention between different compute cores avoided by design. In this work, an execution framework introduced leverages statically allocating subset tasks cores. reduces times memory, as avoided, turn improves schedulability systems. A Constraint Programming...
Modern autonomous cars run classic AUTOSAR applications alongside advanced driving assistance systems on a single-vehicle computer. Ensuring safety and predictability in such complex system is challenging requires temporal isolation between the various components. A promising solution POSIX-compliant QNX operating system: it meets automotive standards for functional at highest level (ISO 26262 ASIL-D) provides through Adaptive Partitioning Scheduler (APS), resource reservation algorithm that...
A majority of multi-rate real-time systems are constrained by a multitude timing requirements, in addition to the traditional deadlines on well-studied response times. This means, predictability these not only depends schedulability certain task sets but also timely propagation data through chains tasks from sensors actuators. In automotive industry, four different constraints corresponding various delays commonly specified systems. paper identifies and addresses source pessimism as well...
Software design for automotive systems is highly complex due to the presence of strict data age constraints event chains in addition task specific requirements. These define maximum time propagation through an chain consisting independently triggered tasks. Tasks can have different periods, introducing over- and under-sampling effects, which additionally aggravates their timing analysis. Furthermore, functionality these systems, developed by suppliers before final system integration on ECU....
The Network-on-Chip (NoC) is the preferred interconnection medium for massively parallel platforms. Targeting real-time applications, fixed-priority based NoCs with virtual channels have been proposed as a promising solution. In order to verify if specific time requirements can be satisfied, schedulability tests are typically used. Several analysis approaches targeting priority-based NoCs. However, due approximation considered in analyses, results may involve large amount of pessimism....
Today, software components are provided by global markets in the form of services. In order to optimally satisfy service requesters and providers, adequate techniques for automatic matching needed. However, a requester's requirements may be vague information available about incomplete. As consequence, fuzziness is induced into procedure. The contribution this paper development systematic procedure that leverages concepts from fuzzy logic possibility theory based on our formal distinction...
Programmable logic controllers are widely used for the control of automation systems. The standard IEC 61131-3 defines execution model as well programming languages such Nowadays, actuators and sensors connect to programmable controller via buses. While buses, actuators, become more powerful, a shift away from current distributed operation systems, close field level, becomes possible. Instead, complex functions can be relocated powerful hardware, technologies. This paper presents an...
Access to shared memory is one of the main challenges for many-core processors. One group scheduling strategies such platforms focuses on division tasks' access and code execution. This allows orchestrate local off-chip in a way that contention between different compute cores avoided by design. In this work, an execution framework introduced leverages statically allocating subset tasks cores. reduces times memory, as avoided, turn improves schedulability systems. A Constraint Programming...