A5050136674- Software Testing and Debugging Techniques
- Formal Methods in Verification
- Embedded Systems Design Techniques
- Blockchain Technology Applications and Security
- VLSI and Analog Circuit Testing
- Parallel Computing and Optimization Techniques
- Graph Theory and Algorithms
- Software Reliability and Analysis Research
- Advanced Graph Neural Networks
- Software Engineering Research
- Software System Performance and Reliability
- Adversarial Robustness in Machine Learning
- Radiation Effects in Electronics
- Advanced Malware Detection Techniques
- VLSI and FPGA Design Techniques
- Distributed systems and fault tolerance
- Low-power high-performance VLSI design
- Interconnection Networks and Systems
- Service-Oriented Architecture and Web Services
- Open Source Software Innovations
- Cloud Computing and Resource Management
- Caching and Content Delivery
- Machine Learning in Materials Science
- Advanced Neural Network Applications
- Real-Time Systems Scheduling
Boğaziçi University
2014-2024
Yıldız Technical University
2018-2021
University of York
2019
ON Semiconductor (United States)
2006
The University of Texas at Austin
2002-2005
Systems Control (United States)
1996
Android applications are used extensively around the world. Many of these contain potential crashes. Black-box testing has been studied over last decade to detect In this paper, we propose QLearning-Based Exploration (QBE), a fully automated black-box methodology, which explores GUI actions using well-known reinforcement learning technique called QLearning. QBE performs automata obtain model AUT, and generates replayable test suites. Specifically, learns from set existing kinds that most...
Deep Learning (DL) systems are key enablers for engineering intelligent applications due to their ability solve complex tasks such as image recognition and machine translation. Nevertheless, using DL in safety- security-critical requires provide testing evidence dependable operation. Recent research this direction focuses on adapting criteria from traditional software a means of increasing confidence correct behaviour. However, they inadequate capturing the intrinsic properties exhibited by...
Due to its multivariate and multipurpose use reuse, data’s worth is dramatically increasing, leading an era characterized by the generation of data marketplaces towards accessing, selling, sharing, trading assets. However, most market vendors still follow a centralized monolithic cloud model for controlling services. Also, this strategy incompatible with European objectives computing economy, lacking sovereignty cross-cloud interoperability principles. Towards these limitations, FAME project...
Abstract Evolutionary coupling (EC) is defined as the implicit relationship between 2 or more software artifacts that are frequently changed together. Changing widely reported to be defect‐prone. In this study, we investigate effect of EC on defect proneness large industrial systems and explain why effects vary. We analysed systems: a legacy financial system modern telecommunications system. collected historical data for 7 years from 5 different repositories containing 176 thousand files....
Design verification has grown to dominate the cost of electronic system design; however, designs continue be released with latent bugs. A test suite developed for a sequential program is not adequate concurrent program. major problem design systems lack good coverage metrics. Coverage metrics are heuristic measures exhaustiveness suite. High coverage, in general, implies fewer SystemC most popular level modeling language used designing SoCs industry. We propose attack quality programs by...
Evolutionary coupling is defined as the implicit relationship between two or more software artifacts that are frequently changed together. In this study we investigate effect of evolutionary on defect proneness a large financial legacy in an industrial development environment. We collected historical data for 5 years from 3 different repositories containing 150 thousand files 274 modules. Our results indicate there positive correlation and measures. Furthermore, built linear logistic...
Summary With the ever‐growing Android graphical user interface (GUI) application market, there have been many studies on automated test generation for GUI applications. These successfully demonstrate how to detect fatal exceptions and achieve high coverage with fully engines. However, it is unclear functions these engines manage test. The current best practice functional testing of applications design (UI) scenarios a non‐technical human‐readable language such as Gherkin implement...
Crypto crimes peaked in 2021, and recent years have shown that blockchain is not going to die but will stay with us. In addition, transaction throughputs are expected rise, which make the manual investigation of next impossible future. We need effective automated solutions monitor detect fraudulent activities happening on blockchains. this paper, we propose a system blacklisted addresses Ethereum blockchain. First, collected data addresses. Then, constructed graph extracted features...
Concurrent and distributed systems, such as system-on-chips (SoCs), present an immense challenge for verification due to their complexity inherent concurrency. Traditional approaches eliminating errors in concurrent systems include formal methods simulation. We approach toward combining simulation a technique called predicate detection (aka runtime verification), while avoiding the of pitfalls ad hoc Our enables efficient on execution traces actual scalable systems. methodologies are...
Graphics Processing Units (GPUs) are gaining popularity for parallelization of general purpose applications. GPUs massively parallel processors with huge performance in a small and readily available package. At the same time, emergence programming environments such as CUDA shorten learning curve GPU programming. We present GPU-based logic simulation algorithm electronic designs. Logic is crucial component verification designs that allows one to check whether design behaves according...
Verification of analog/mixed-signal (AMS) circuits is complicated by the difficulty obtaining circuit models at suitable levels abstraction. We propose a method to automatically generate abstract for formal verification and system-level simulation from transistor-level traces. This paper discusses application proposed methodology switched capacitor integrator PLL phase detector.
Detection of a global predicate is fundamental problem in distributed computing. In this paper we describe new detection algorithms for certain temporal logic predicates. We use logic, CTL, specifying properties computation and interpret it on finite lattice states. present solutions to the linear observer-independent predicates under <b xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">EG</b> xmlns:xlink="http://www.w3.org/1999/xlink">AG </b>...
Correct concurrent System-on-Chips (SoCs) are very hard to design and reason about. In this work, we develop an automated framework complete with concurrency-oriented verification coverage techniques for system-level designs. Our different from traditional simulation-based reliability techniques, since concurrency information is often lost in techniques. We preserve obtain unique that allow us predict potential errors (formulated as transaction-level assertions) error-free simulations. order...
We present a novel automated multicore benchmark synthesis framework with characterization and generation components. Our uses parallel patterns in capturing important characteristics of multi-threaded applications generates synthetic benchmarks from those applications. The resulting are small, fast, portable, human-readable, they accurately reflect microarchitecture dependent independent the original Also, can use either Pthreads or MCA libraries. implement our techniques MINIME tool...
Context: Building defect prediction models for software projects is helpful reducing the effort in locating defects. In this paper, we share our experiences building a model large industrial project. We extract product and process metrics to build show that can an accurate even when 4% of defective.
Testing Deep Neural Network (DNN) models has become more important than ever with the increasing usage of DNN in safety-critical domains such as autonomous cars. The traditional approach testing DNNs is to create a test set, which random subset dataset about problem interest. This kind not enough for most real-world scenarios since these sets do include corner cases, while case input generally considered introduce erroneous behaviors. Recent works on adversarial generation, data...
Checking the correctness of software is a growing challenge. In this paper, we present prototype implementation Partial Order Trace Analyzer (POTA), tool for checking execution traces both message passing and shared memory programs using temporal logic. So far runtime verification tools have used total order model an trace, whereas POTA uses partial model. The enables us to capture possibly exponential number interleavings and, in turn, allows find bugs that are not found However, suffers...
Concurrent interaction of multi-processor systems result in errors which are difficult to find. Traditional simulation-based verification techniques remove the concurrency information by arbitrary schedulings. We present a novel technique for SystemC that preserves and exploits information. Our approach is unique we can detect potential an observed execution, even if error does not actually occur execution. identify synchronization constructs develop predictive temporal assertion deadlock...
Abstract Ability to perform fast analysis on massive public blockchain transaction data is needed in various applications such as tracing fraudulent financial transactions. The continuously growing and organized a sequence of blocks containing This organization, however, cannot be used for parallel graph algorithms which need efficient distributed structures. Using message passing libraries (MPI), we develop scalable cluster-based system that constructs implement algorithms. We report...
Functional design verification is the task of establishing that a given accurately implements intended functional behavior. Today, has grown to dominate cost electronic system design, however, designs continue be released with latent bugs. System level modeling commonly used for designing concurrent SoCs in industry. SystemC most popular description language. Non-determinism and concurrency problems such as starvation, interference deadlock make it harder verify programs than sequential...
There have been many studies on automated test generation for mobile Graphical User Interface (GUI) applications. These successfully demonstrate how to detect fatal exceptions and achieve high code activity coverage with fully engines. However, it is unclear GUI functions these engines manage test. Furthermore, implement only implicit oracles. We propose Fully Automated Reinforcement LEArning-Driven Specification-Based Test Generator Android (FARLEAD-Android). FARLEAD-Android accepts a...