Gregorio Zamora‐Mejia

ORCID: 0000-0002-6509-0305
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About
Contact & Profiles
Research Areas
  • Analog and Mixed-Signal Circuit Design
  • Energy Harvesting in Wireless Networks
  • Advancements in Semiconductor Devices and Circuit Design
  • Advancements in PLL and VCO Technologies
  • CCD and CMOS Imaging Sensors
  • RFID technology advancements
  • Neuroscience and Neural Engineering
  • Low-power high-performance VLSI design
  • Full-Duplex Wireless Communications
  • Chaos control and synchronization
  • Modular Robots and Swarm Intelligence
  • Innovative Energy Harvesting Technologies
  • Sensor Technology and Measurement Systems
  • Radio Frequency Integrated Circuit Design
  • Antenna Design and Analysis
  • Advanced Sensor and Energy Harvesting Materials
  • Radiation Effects in Electronics
  • ECG Monitoring and Analysis
  • VLSI and Analog Circuit Testing
  • Ion-surface interactions and analysis
  • Context-Aware Activity Recognition Systems
  • IoT-based Smart Home Systems
  • Wireless Power Transfer Systems
  • Tactile and Sensory Interactions
  • Water Quality Monitoring Technologies

National Institute of Astrophysics, Optics and Electronics
2022-2025

Consejo Nacional de Humanidades, Ciencias y Tecnologías
2022-2025

Benemérita Universidad Autónoma de Puebla
2018-2021

Universidad del Valle de México
2020-2021

Autonomous University of San Luis Potosí
2021

Ibero-American University Puebla
2019-2020

Universidad del Valle de Puebla
2020

Universidad Veracruzana
2014-2016

This work describes MexSIC, a data acquisition channel designed for Silicon Photomultipliers (SiPMs), composed of mixed-mode application specific integrated circuit (ASIC) front-end, an FPGA-based processing stage, and user interface. The ASIC provides 1-bit sigma-delta modulated (ΣΔ – <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">M</i> ) digital equivalent the input SiPM current, flag indicating start/end pulse, clock reference generated...

10.1109/tns.2025.3528905 article EN IEEE Transactions on Nuclear Science 2025-01-01

ABSTRACT This work shows the development of an electrocardiogram (ECG) data masking system based on double‐scroll synchronized chaotic oscillators. The contribution is devoted to introduction a CMOS implementation oscillator, which designed by taking advantage intrinsic hyperbolic tangent‐type characteristic operational transconductance amplifier (OTA). behavior oscillator guaranteed plotting bifurcation diagram and evaluating Lyapunov exponents. In this manner, systems protect privacy while...

10.1002/cta.4500 article EN other-oa International Journal of Circuit Theory and Applications 2025-03-04

This work presents a Cap-less Low-Drop Out (LDO) Voltage Regulator that uses Bootstrap Flipped-Voltage Follower (B-FVF) as the input stage of its active compensation network. Previous works use networks whose frequency response shows high-pass behavior depends on their capacitor Cf. The dominant pole is related to value By using B-FVF, this Cf-pole dependency broken; only gain loop lies Cf, while referred B-FVF node capacitance. advantage allows integration smaller 10X reduction compared...

10.1016/j.mejo.2020.104809 article EN Microelectronics Journal 2020-05-17

This work presents a reconfigurable-band analog filter capable of performing the low-pass, high-pass, band-pass or all-pass functions. The proposed is simple and compact cell composed only two RC networks one differential Operational Transconductance Amplifier (OTA). To select desired type, configurations must be done: 1) network shall configured as low-pass/low-pass, high-pass/high-pass low-pass/high-pass, 2) input signals fed in single mode. validate theory simulations, was designed,...

10.1109/access.2024.3358212 article EN cc-by-nc-nd IEEE Access 2024-01-01

Theft and exchange of newborns have rise its numbers becoming this topic a big issue that must be face up by hospitals. Closed Circuit Television (CCTV) surveillance is one the most used solutions. However, CCTV needs human operator highly implementation cost. Ultra High Frequency Radio IDentification (UHF RFID) brings an easy cheap solution to problematic because automatic real time control monitoring passive elements called tags. This work presents design two UHF RFID meander line antennas...

10.1109/colcomcon.2014.6860415 article EN 2014-06-01

This work proposes a Digitally Enhanced Low-Drop Out Voltage Regulator (DE-LDO) for Ultra High Radio Frequency IDentification (UHF RFID) passive tags. The DE-LDO design approach is based on the Finite State Machine (FSM) nature of tag Digital Control. Injecting part FSM unconsumed current into LDO loop to enhance transient response, more flat output voltage obtained. Chip measurements shows that consumes quiescent 600 nA at 1.6 V, delivering an and 8 µA 1.2 V; 69.76% Power Efficiency (PE)...

10.1587/elex.13.20150989 article EN IEICE Electronics Express 2016-01-01

In this work the design and implementation of a white-cane suitable for blind people is presented. The sensing method based on relation distance/vibration; closer object, faster vibration magnitude. magnitude passed by four micro DC motors into fingers user, indicating proximity to object its localization. index, middle, ring, baby are used indicate position left, front, respectively. sensors located 3-D printed phantom model glasses, enabling capability whole environment in 360° fashion...

10.1109/icev50249.2020.9289667 article EN 2020-10-26

Self-powered RF passive sensors have potential application in temperature measurements of patients with health problems. Herein, this work presents the design and implementation a self-powered UHF tag prototype for biomedical monitoring. The proposed battery-free sensor is composed three basic building blocks: high-frequency section, micro-power management stage, sensor. This uses an 860 MHz to 960 carrier 1 W Effective Isotropic Radiated Power (EIRP) harvest energy its operation, showing...

10.3390/electronics11071108 article EN Electronics 2022-03-31

This work presents a 910MHz/2.4GHz dual-band dipole antenna for Power Harvesting and/or Sensor Network applications whose main advantage lies on its easily tunable bands. Tunability is achieved via the low and high frequency separation W <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">gap</sub> . used to increase or decrease S11 magnitude of required Such tunability can be harvest energy in environments where electric field strength one carrier...

10.1109/iccsat.2015.7362923 article EN 2015-10-01

Ultra low-power electronic design is the backbone methodology tool in sensor integration architectures, networking, biomedical applications and wearable electronics. These implementations demand multiple supply voltage domains with different current level requirements that vary from a few microamperes to hundred of miliamperes, such task done by regulators. This work studies lower limits DC-DC power conversion Buck Converters as well its feasibility be embedded ultra regulator supply;...

10.1109/iesummit.2016.7459758 article EN 2016-03-01

This paper presents the design of a Voltage Regulation System for UHF Passive RFID Tags which consists Clamp Circuit and LDO Regulator. The Clamp's current consumption is 100nA 1μA when voltage reaches levels 2.6V 3.6V, respectively. Regulator capable supplying load 4.5 μA with only 900nA. has an overall efficiency 73%, provides regulation 25.53mV/μA settling time 4μs. design, simulation layout are realized using 0.50 μm technology ON-SEMI two poly — three metal.

10.1109/sbcci.2013.6644852 article EN 2013-09-01

This work presents the design and simulation of an indirect compensated class-AB operational transconductance amplifier (OTA) suitable for low-power low-voltage applications. The designed OTA is made up a two-stage that stabilized using Miller compensation capacitor while Class-AB modification used to enhance slew rate overall amplifier. Self-cascode composite transistor were improve DC gain. gain, bandwidth, gain-bandwidth product, phase margin 79.6 dB, 79 Hz, 655 kHz, 42°, respectively....

10.1109/icev50249.2020.9289681 article EN 2020-10-26

In this work the design and implementation of a first-order all-pass filter (APF) based on current differential amplifier is presented. The proposed APF composed by only seven MOS transistors one capacitor. One major advantage that current-mode signal processed NMOS while avoids any extra PMOS paths. Due to its compactness, can operate under nominal low voltage supply, allowing high-frequency or low-voltage low-power operation modes. To validate propose circuit APFs were designed simulated...

10.1109/icev56253.2022.9959226 article EN 2022-10-24

Some of the flaws in interconnection wires digital integrated circuits can be caused by fabrication defects or wear as effect electromigration effect. Interconnection add parasitic effects such resistances and capacitances which contribute to propagation delay a logic gate signal another. For long length Elmore model for RC networks ladder, allows estimate wire ideally without faults, give vision repercussions output between two connected inverters with faulty at different points. Therefore,...

10.1109/iccsat.2015.7362955 article EN 2015-10-01

This work presents a Time-to-Digital Converter implemented using two nested Johnson counters and suitable for time-lapse measurement applications. The proposed structure is composed of 4-bit counters, digital-logic control networks, registers single decoder. Semi-dynamic logic was used the decoder to reduce its power consumption. system has standard digital output powered by 1.8 V supply with total consumption 32.4 mW. A prototype fabricated TSMC 180 nm CMOS technology. uses 508 µm x 225...

10.18845/tm.v36i6.6769 article EN cc-by-nc-nd Revista Tecnología en Marcha 2023-06-29

Nowadays analog-to-digital converters (ADCs) are widely used and can be found in various applications that require the conversion of analog signals to digital domain. Despite abundance literature on ADC design, there is little information regarding accurate characterization these devices, resulting common errors when simulating determining their key parameters, especially for most important one, effective number bits (ENOB). This papers provides a comprehensive guide proper ENOB ADCs. Also,...

10.1109/icev59168.2023.10329754 article EN 2023-10-23
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