Joseph Riad

ORCID: 0000-0002-6808-8673
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About
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Research Areas
  • Analog and Mixed-Signal Circuit Design
  • Advancements in Semiconductor Devices and Circuit Design
  • Low-power high-performance VLSI design
  • Electrostatic Discharge in Electronics
  • Blood Pressure and Hypertension Studies
  • Radio Frequency Integrated Circuit Design
  • Embedded Systems Design Techniques
  • MRI in cancer diagnosis
  • Parallel Computing and Optimization Techniques
  • 3D IC and TSV technologies
  • Diverticular Disease and Complications
  • Radiation Effects in Electronics
  • VLSI and FPGA Design Techniques
  • Interconnection Networks and Systems
  • Advanced DC-DC Converters
  • Advanced Sensor and Energy Harvesting Materials
  • Heat Transfer and Optimization
  • Semiconductor materials and devices
  • Dementia and Cognitive Impairment Research
  • VLSI and Analog Circuit Testing
  • Chronic Kidney Disease and Diabetes
  • Renal and Vascular Pathologies
  • Anorectal Disease Treatments and Outcomes
  • Silicon Carbide Semiconductor Technologies
  • Advanced MEMS and NEMS Technologies

Memorial Sloan Kettering Cancer Center
2022

Sprint (United States)
2021

SPRINT
2021

Texas A&M University
2018-2021

Texas A&M University System
2020

Ain Shams University
2014

Multistage amplifiers are a reliable method of achieving high gain in systems where the voltage supply is low. The common practice to prefer 3-stage over 4-stage ones when <;120 dB required, since former easier compensate. In this article, we employ four stages relax constraints on each stage. An extension single Miller-capacitor compensation and active-parallel operational transconductance amplifier (OTA) design work capable driving capacitor range 400 pF 12 nF(30×) by consuming total power...

10.1109/tvlsi.2020.2993059 article EN IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2020-05-19

Since operational transconductance amplifiers (OTAs) form the basic building blocks of many analog systems, compensation three-stage OTAs has attracted a lot attention in literature. Many different solutions to stability problem such have been proposed over past 20 years, with each solution exhibiting properties or targeting application. This work surveys broad selection previously reported architectures and proposes novel classification scheme that exposes features common seemingly serves...

10.3390/electronics8111268 article EN Electronics 2019-11-01

With the aggressive scaling of transistor dimensions, intrinsic device gains are dropping but need for high-gain amplifiers still exists, resulting in a great interest multistage amplifiers. Most existing amplifier topologies rely on Miller capacitors which achieve stability at expense reduced speed. In this paper, new state feedback compensation strategy with gain enhancement using partial positive is proposed whereby can be made output-compensated, thereby requiring no capacitance while...

10.1109/tcsi.2020.2978515 article EN publisher-specific-oa IEEE Transactions on Circuits and Systems I Regular Papers 2020-03-11

Integrating multiple on-chip voltage regulators in a power delivery network (PDN) can offer promising improvements both regulation and efficiency. However, the complex interactions between active surrounding parasitic passive create large number of feedback loops thus cause stability concern for distributed network. The recently emerged PDN design methodology based on hybrid theory (HST) provides unique opportunity taming problem. HST-based margin is unfamiliar to circuit designers,...

10.1109/tvlsi.2018.2818079 article EN publisher-specific-oa IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2018-04-04

Fully differential amplifiers require the use of common-mode feedback (CMFB) circuits to properly set amplifier’s operating point. Due scaling trends in CMOS technology, modern increasingly rely on cascading more than two stages achieve sufficient gain. With multiple gain stages, different topologies for implementing CMFB are possible, whether using a single loop or ones. However, impact performance each approach has seldom been studied literature. The aim this work is guide choice...

10.3390/electronics10090991 article EN Electronics 2021-04-21

With the growing performance and wide application of deep neural networks (DNNs), recent years have seen enormous efforts on DNN accelerator hardware design for platforms from mobile devices to data centers. The systolic array has been a popular architectural choice many proposed accelerators with hundreds thousands processing elements (PEs) parallel computing. Systolic array-based datacenter applications high power consumption nonuniform workload distribution, which makes delivery network...

10.1109/iccd50377.2020.00088 article EN 2022 IEEE 40th International Conference on Computer Design (ICCD) 2020-10-01

A major challenge currently facing integrated systems, such as microprocessors and systems-on-chip is power delivery. With increasing system size complexity, multiple voltage regulators are often needed for a single domain. This connection raises non-trivial stability issues that render the useless. It therefore of great practical interest to tackle systems. brief proposes design centralized controller with aim rendering delivery networks (PDNs) stable without compromising their performance....

10.1109/tcsii.2019.2926670 article EN publisher-specific-oa IEEE Transactions on Circuits & Systems II Express Briefs 2019-07-09

Large-scale systems-on-a-chips (SoCs) have stringent power requirements to ensure adequate supply of on-die devices and prevent catastrophic timing violations. Heterogeneous voltage regulation (HVR) leveraging a combination on-chip off-chip regulators has been advocated for ensuring integrity with maximum efficiency. However, unavoidable process temperature variations not considered in prior HVR work. In this paper, we present an in-depth evaluation the impacts on HVR. Furthermore, propose...

10.1109/isqed48828.2020.9136985 article EN 2020-03-01

Harsh conditions of high temperature and pressure typically present in industrial applications sensing pose unique challenges to system design, modeling simulation. Capacitive sensor structures, operating touch mode at pressures, a complicated problem for closed form numerical Furthermore, material such as silicon carbide (SiC) that is able withstand temperatures pressures needs be used instead the more conventional silicon. The absence standard circuit models simulation SiC devices makes...

10.1109/uksim.2014.34 article EN 2014-03-01

Pressure sensing in harsh environments poses many difficulties.The major challenge is implementing a sensor interface circuit capable of operation at high temperatures ( 300°C) for extended periods time.Conventional, siliconbased electronics are not suitable such conditions due to their sizable leakage currents and junction instability.In this work, wireless solution based on silicon carbide presented.The proposed follows simple design procedure exhibits robustness the large process...

10.21608/iceeng.2014.30494 article EN The International Conference on Electrical Engineering/The International Conference on Electrical Engineering 2014-05-01
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