Hyoseung Kim

ORCID: 0000-0002-8553-732X
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About
Contact & Profiles
Research Areas
  • Real-Time Systems Scheduling
  • Parallel Computing and Optimization Techniques
  • Distributed systems and fault tolerance
  • Embedded Systems Design Techniques
  • Context-Aware Activity Recognition Systems
  • Distributed and Parallel Computing Systems
  • Interconnection Networks and Systems
  • Energy Efficient Wireless Sensor Networks
  • Security and Verification in Computing
  • Maritime Navigation and Safety
  • IoT and Edge/Fog Computing
  • Green IT and Sustainability
  • Marine and Coastal Research
  • Cloud Computing and Resource Management
  • Technology and Data Analysis
  • Software System Performance and Reliability
  • Insect and Pesticide Research
  • Data Stream Mining Techniques
  • Age of Information Optimization
  • Advanced Computational Techniques and Applications
  • Plant and animal studies
  • IoT-based Smart Home Systems
  • Augmented Reality Applications
  • Modular Robots and Swarm Intelligence
  • Petri Nets in System Modeling

University of California, Riverside
2016-2025

Korea Maritime and Ocean University
2015-2022

University of California System
2017-2020

Carnegie Mellon University
2002-2018

Yonsei University
2006-2015

Severance Hospital
2015

Software Engineering Institute
2014

Korea University
2014

LG (South Korea)
2010

Korea Atomic Energy Research Institute
2003

In commercial-off-the-shelf (COTS) multi-core systems, a task running on one core can be delayed by other tasks simultaneously cores due to interference in the shared DRAM main memory. Such memory delay large and highly variable, thereby posing significant challenge for design of predictable real-time systems. this paper, we present techniques provide tight upper bound worst-case COTS-based system. We explicitly model major resources system, including banks, buses controller. By considering...

10.1109/rtas.2014.6925998 article EN 2014-04-01

As the complexity of software for Cyber-Physical Systems (CPS) rapidly increases, multi-core processors and parallel programming models such as OpenMP become appealing to CPS developers guaranteeing timeliness. Hence, a task on is expected vital component in self-driving car, where tasks must be scheduled real-time.

10.1145/2502524.2502530 article EN 2013-04-08

Many modern multi-core processors sport a large shared cache with the primary goal of enhancing statistic performance computing workloads. However, due to resulting interference among tasks, uncontrolled use such can significantly hamper predictability and analyzability real-time systems. Software partitioning has been considered as an attractive approach address this issue because it does not require any hardware support beyond that available on many processors. state-of-the-art software...

10.1109/ecrts.2013.19 article EN 2013-07-01

Deep neural networks (DNNs) have been showing significant success in various applications, such as autonomous driving, mobile devices, and Internet of Things. Although much research has conducted to optimize the structure DNNs, limited attention given their timely execution, specifically on scheduling real-time inference requests DNN models. For instance, existing frameworks, Caffe, TensorFlow Torch, only provide a single-level priority, one-DNN-per-process execution model sequential...

10.1109/rtss46320.2019.00042 article EN 2019-12-01

In ROS (Robot Operating System), most applications in time- and safety-critical domain are constructed the form of callback chains with data dependencies. Due to shortcomings its real-time support, does not provide a strong timing guarantee may lead disastrous results. Although ROS2 claims enhance capability, ensuring predictable end-to-end chain latency still remains challenging problem. this paper, we propose new priority-driven chain-aware scheduler for framework present analysis proposed...

10.1109/rtas52030.2021.00028 article EN 2021-05-01

In commercial-off-the-shelf (COTS) multi-core systems, the execution times of tasks become hard to predict because contention on shared resources in memory hierarchy. particular, a task running one processor core can delay another core. This is due fact that access data same cache set among cores or bank DRAM (or both). Such and interference effects have motivated need create isolation mechanisms for accessed by more than task. One popular mechanism coloring divides into multiple partitions....

10.1109/cse.2013.106 article EN 2013-12-01

This paper presents the design principles, implementation, and evaluation of RETOS operating system which is specifically developed for micro sensor nodes. has four distinct objectives, are to provide (1) a multithreaded programming interface, (2) resiliency, (3) kernel extensibility with dynamic reconfiguration, (4) WSN-oriented network abstraction. system, hence it provides commonly used thread model interface developers. We have various implementation techniques optimize performance...

10.1145/1236360.1236381 article EN 2007-01-01

Honeybees, as natural crop pollinators, play a significant role in biodiversity and food production for human civilization. Bees actively regulate hive temperature (homeostasis) to maintain colony’s proper functionality. Deviations from usual thermoregulation behavior due external stressors (e.g., extreme environmental temperature, parasites, pesticide exposure, etc.) indicate an impending colony collapse. Anticipating such threats by forecasting finding changes patterns would allow...

10.1145/3719014 article EN ACM Transactions on Knowledge Discovery from Data 2025-02-21

The second generation of Robotic Operating System, ROS 2, has gained much attention for its potential to be used safety-critical robotic applications. need provide a solid foundation timing correctness and scheduling mechanisms is therefore growing rapidly. Although there are some pioneering studies conducted on formally analyzing the response time processing chains in focus been limited singlethreaded executors, multi-threaded despite their advantages, have not studied well. To fill this...

10.1109/rtas58335.2023.00016 article EN 2023-05-01

Real-time virtualization has gained much attention for the consolidation of multiple real-time systems onto a single hardware platform while ensuring timing predictability. However, shared last-level cache (LLC) on modern multi-core platforms can easily hamper predictability due to resulting temporal interference among consolidated workloads. Since such caused by LLC is highly variable and may have not even existed in legacy be consolidated, it poses significant challenge virtualization. In...

10.1145/3092946 article EN ACM Transactions on Embedded Computing Systems 2017-12-06

Lipopolysaccharide (LPS), found in the outer membrane of Gram negative bacteria, only exerts its toxic effects when free form. LPS has three major parts, lipid A, component, along with a core polysaccharide and O-specific polysaccharide. monomers are known to have molecular masses between 10 30 kDa. Under physiological conditions, exists equilibrium monomer vesicle forms. removal by 100 kDa ultrafiltration was more efficient (99.6% removed) low concentration protein (2.0 mg/ml) compared high...

10.5483/bmbrep.2009.42.7.462 article EN cc-by-nc BMB Reports 2009-07-31

Real-time virtualization techniques have been investigated with the primary goal of consolidating multiple real-time systems onto a single hardware platform while ensuring timing predictability. However, shared last-level cache (LLC) on recent multi-core platforms can easily hamper predictability due to resulting temporal interference among consolidated workloads. Since such caused by LLC is highly variable and may not even existed in legacy be consolidated, it poses significant challenge...

10.1145/2968478.2968480 article EN 2016-10-01

The virtualization of real-time systems has received much attention for its many benefits, such as the consolidation individually developed applications while maintaining their implementations. However, current state art still lacks properties required resource sharing among application tasks in a multi-core environment. In this paper, we propose vMPCP, synchronization framework systems. Vmpcp exposes executions critical sections guest virtual machine to hyper visor. Using approach, vMPCP...

10.1109/rtss.2014.11 article EN 2014-12-01

Hardware accelerators such as GP-GPUs and DSPs are being increasingly used in computationally-intensive real-time multimedia systems. System efficiency is often increased when CPU tasks suspend while using these devices. In this paper, we extend the existing Multiprocessor Priority Ceiling Protocol (MPCP) schedulability analysis particular context. We present three methods to improve traditional MPCP that reduces pessimism analyzing blocking times. Two of methods, request-driven job-driven...

10.1109/rtas.2018.00027 article EN 2018-04-01

Many cyber-physical applications including sensing and control operations can tolerate a certain degree of timing violations as long the number are predictably bounded. The notion weakly-hard real-time systems has been studied to capture this effect, but existing work reveals limitations for practical use due restrictions imposed on model high complexity analysis. In paper, we propose new job-class-level fixed-priority preemptive scheduler its schedulability analysis framework sporadic tasks...

10.1109/rtas.2019.00028 article EN 2019-04-01

Intermittently powered devices (IPDs) have gained much interest in recent years. However, scheduling real-time tasks while supporting data consistency, timekeeping, and schedulability guarantees on these still remains a challenge. Many sensing need long indivisible sensor reading operations, but most prior work has limited their focus to the forward progress of computation-only tasks. In this article, we propose framework execute periodic with atomic operations. Our proposed method keeps...

10.1109/jiot.2021.3065947 article EN publisher-specific-oa IEEE Internet of Things Journal 2021-03-15

We propose a server-based approach to manage general-purpose graphics processing unit (GPU) in predictable and efficient manner. Our proposed introduces GPU server task that is dedicated handling requests from other tasks on their behalf. The ensures bounded time access the GPU, allows suspend during computation save CPU cycles. By doing so, we address two major limitations of existing real-time synchronization-based management approach: busy waiting long priority inversion. implemented...

10.1109/rtcsa.2017.8046309 article EN 2017-08-01

Future autonomous systems will employ complex sensing, computation, and communication components for their perception, planning, control, coordination, could operate in highly dynamic uncertain environment with safety security assurance. To realize this vision, we have to better understand address the challenges from "unknowns" - unexpected disturbances component faults, environmental interference, malicious attacks, as well inherent uncertainties system inputs, model inaccuracies, machine...

10.1145/3400302.3415768 article EN 2020-11-02

Consider fixed-priority preemptive partitioned scheduling of constrained-deadline sporadic tasks on a multiprocessor. A task generates sequence jobs and each job has deadline that must be met. Assume have Corunner-dependent execution times; i.e., the time J depends set happen to execute (on other processors) at instants when executes. We present model describes times. For this model, we show exact schedulability testing is co-NP-hard in strong sense. Facing complexity, sufficient test, which...

10.1145/3203407 article EN ACM Transactions on Embedded Computing Systems 2018-05-22

Graphics Processing Units (GPUs) have been considered as a promising technology to address the high computational demands of real-time data-intensive applications. Today's embedded processors already offer on-chip GPUs, use which can greatly help satisfy timing requirements realtime tasks by accelerating their execution. However, existing GPU management schemes either underutilize due strictly serialized execution or introduce non-deterministic delay caused uncontrolled concurrent In this...

10.1109/rtcsa.2019.8864564 article EN 2019-08-01

The recent trend in real-time applications raises the demand for powerful embedded systems with GPU-CPU integrated systems-on-chips (SoCs). This increased performance, however, comes at cost of power consumption and resulting heat dissipation. Heat conduction interferes execution time tasks running on adjacent CPU GPU cores. violation thermal constraints causes timing unpredictability to due transient performance degradation or permanent system failure. In this paper, we propose a...

10.1109/rtas.2019.00029 article EN 2019-04-01
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