A5102967917- Semiconductor materials and devices
- Advancements in Semiconductor Devices and Circuit Design
- VLSI and Analog Circuit Testing
- Low-power high-performance VLSI design
- Integrated Circuits and Semiconductor Failure Analysis
- Advanced Memory and Neural Computing
- Quantum-Dot Cellular Automata
- Radiation Effects in Electronics
- Image and Video Quality Assessment
- VLSI and FPGA Design Techniques
- Video Coding and Compression Technologies
- Nanowire Synthesis and Applications
- Interconnection Networks and Systems
- Advancements in Battery Materials
- Error Correcting Code Techniques
- Analog and Mixed-Signal Circuit Design
- Advanced Battery Materials and Technologies
- Advanced Vision and Imaging
- Cryptographic Implementations and Security
- Embedded Systems Design Techniques
- Parallel Computing and Optimization Techniques
- Supercapacitor Materials and Fabrication
- Chaos-based Image/Signal Encryption
- Physical Unclonable Functions (PUFs) and Hardware Security
- Analytical Chemistry and Sensors
Missouri University of Science and Technology
2015-2024
Konkuk University
2023-2024
Yonsei University
2017-2022
Korea Electronics Technology Institute
2018
Emerson (United States)
2017
Shinhan University
2017
Kyung Hee University
2009-2016
Northeastern University
2012
Korea University
2008-2009
Korea Advanced Institute of Science and Technology
2008
The Na 2 MoO 4 -coated NaNi 1/3 Fe Mn O is used for Na-ion battery cathodes. uniform coating layer successfully formed using a polyvinylpyrrolidone-anchored complex process.
Sodium-ion batteries (SIBs) are close to commercialization. Although alloying anodes have potential use in next-generation SIB anodes, their limitations of low capacities and colossal volume expansions must be resolved. Traditional approaches involving structural compositional tunings not been able break these lofty barriers. This review is devoted recent progress research on alloy-based comprising Sn, Sb, P, Ge, Si. The current level understanding, challenges, modifications, optimizations...
In this paper, a novel low-power design technique is proposed to minimize the standby leakage power in nanoscale CMOS very large scale integration (VLSI) systems by generating adaptive optimal reverse body-bias voltage. The voltage generated from monitoring circuit, which compares subthreshold current ( <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I</i> <sub xmlns:xlink="http://www.w3.org/1999/xlink">SUB</sub> ) and band-to-band tunneling...
As the physical gate length of current devices is reduced to below 65 nm, effects (such as large parametric variations and increase in leakage current) have caused I–V characteristics be substantially depart from those commonly associated with traditional MOSFETs, thus impeding efficient development manufacturing at deep submicro/nano scales. Carbon Nanotube Field Effect Transistors (CNFETs) received widespread attention, one promising technologies for replacing MOSFETs end Technology...
This paper demonstrates the hardware implementation of a recently proposed low-power asynchronous Advanced Encryption Standard substitution box (S-Box) design that is capable being resistant to side channel attack (SCA). A specified SCA standard evaluation field-programmable gate array (FPGA) board (SASEBO-GII) used implement both synchronous and S-Box designs. based on self-time logic referred as null convention (NCL), which supports few beneficial properties for resisting SCAs: clock free,...
A Si/rGO/SiOC composite is designed using hydrophobic rGO for uniform distribution of Si in SiOC matrix. contributed to the improvement electrical conductivity, and volume expansion was effectively alleviated by material.
The offset voltage of the dynamic latched comparator is analyzed in detail, and design optimized for minimal based on analysis this paper. As a result, 1-sigma was reduced from 12.5mV to 6.5mV at cost 9% increase power dissipation (152μW 136μW). Using digitally controlled capacitive calibration technique, further 6.50mV 1.10mV operating clock frequency 3GHz it consumes 54μW/GHz after calibration.
Because of the continued scaling technology and supply-threshold voltage, leakage power has become more significant in dissipation nanoscale CMOS circuits. Therefore, estimating total is critical to designing low-power digital In nanometer circuits, main components are subthreshold, gate-tunneling, reverse-biased junction band-to-band-tunneling (BTBT) currents.
In this paper, a trajectory optimization algorithm for multiple unmanned aerial vehicles (UAVs) is investigated free space optic (FSO) based wireless communication networks, which composed of UAVs and ground terminals (GTs). Considering the FSO channel model line sight (LoS) probability, altitude connection between each GT UAV decided by predetermined radius area GT. A multi-UAV (MUTO) scheme proposed to maximize service time. MUTO scheme, first, network divided into sectors using graph...
Because of the continued scaling technology and supply-threshold voltage, leakage power has become more significant in dissipation nanoscale CMOS circuits. Therefore, estimating total is critical to designing low-power digital In nanometer circuits, main components are subthreshold, gate-tunneling, reverse-biased junction band-to-band-tunneling (BTBT) currents.
Modulo 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sup> + 1 multiplier is one of the critical components in area data security applications such as International Data Encryption Algorithm (IDEA), digital signal processing, and fault-tolerant systems that demand high reliability fault tolerance. Transient faults caused by electrical noise or external interference are resulting soft errors which should be detected online. The...
This work presents the design, hardware implementation, and performance analysis of novel asynchronous AES (advanced encryption standard) Key Expander Round Function, which offer increased side-channel attack (SCA) resistance. These designs are based on a delay-insensitive (DI) logic paradigm known as null convention (NCL), supports useful properties for resisting SCAs including dual-rail encoding, clock-free operation, monotonic transitions. Potential benefits include reduced more uniform...
We present various 4-bit /spl times/ unsigned multipliers designed using the delay-insensitive null convention logic (NCL) paradigm. They represent bit-serial, iterative, and fully parallel multiplication architectures. NCL is a self-timed paradigm in which control inherent each datum. follows so-called weak conditions of Seitz's signaling scheme. Like other methods, assumes that forks wires are isochronic. uses symbolic completeness expression to achieve behavior. Simulation results show...
In this work, a novel memristor lookup table (MLUT)-based asynchronous nanowire reconfigurable crossbar architecture (ANRCA) is proposed. Unlike the existing architectures that mostly use crosspoints as pro-grammable diodes and/or field-effect transistors, proposed utilizes configurable memristors to realize nanoscale tables (LUTs) and relies on delay-insensitive logic paradigm known Null Convention Logic (NCL) for clock-free operation. The primitive block of MLUT ANRCA referred Programmable...
As next generation communication technologies emerge, new high data rate applications and high-definition large-screen video streaming have become very popular. a result, network traffic has been increasing so much that existing backhaul networks soon will not be able to support all demands. To these needs in future 6G mobile systems, the establishment of an additional wireless is considered essential. one solutions, based on aerial platform proposed. In order explore potential platforms as...
The recently proposed nanoscale asynchronous crossbar architecture based on memristor-based look up table (MLUT) combines the advantages of memristor technology and design for viable computing. In spite having numerous merits over clocked counterparts previous designs, it is bound to have inevitable defects due nondeterministic assembly. order assess reliability MLUT, there a need develop efficient testing techniques. Typical approach so far has been test every crosspoint each MLUT...
5G systems use multiple radio access technology (multi-RAT) to provide broadband, low latency, and high reliability services. Multi-RAT is effective when multipath transmission used over multichannels. This why based one of the key technologies that can improve throughput real-time video streaming networks. paper proposes two concurrent transfer techniques; fast (FCT) reliable (RCT). FCT aims minimize round trip time (RTT) required for frame by arranging each packets constituting a be sent...
With the advent of 5G, development extended reality (XR) technology, which combines augmented (AR), virtual (VR), and advanced human-computer interaction (HCI) is considered one key technologies future metaverse engineering. Especially, XR real-time modeling simulation (M&S) devices that can be applied to various fields (e.g., emergency training simulations, etc.) have tasks with large amounts data processed. However, if task processed only by wireless user equipment (UE), UE's energy may...