Crosstalk noise is an intrinsic characteristic of photonic devices used by optical networks-on-chip (ONoCs) as well a potential issue. For the first time, this paper analyzed and modeled crosstalk noise, signal-to-noise ratio (SNR), bit error rate (BER) routers ONoCs. The analytical models for minimum SNR, maximum BER in meshbased ONoCs are presented. An automated analyzer developed. We find that significantly limits scalability example, due to 10-3 on 8x8 mesh-based ONoC using optimized...

As benchmark programs for microprocessor architectures, network-on-chip (NoC) traffic patterns are essential tools NoC performance assessments and architecture explorations. The fidelity of has profound influence on studies. For the first time, this paper presents a realistic suite, called MCSL, methodology used to generate it. publicly released MCSL suite includes set 8 real applications covers popular architectures. It captures not only communication behaviors in NoCs but also temporal...

Optical networks-on-chip (ONoCs) are emerging communication architectures that can potentially offer ultrahigh bandwidth and low latency to multiprocessor systems-on-chip (MPSoCs). In addition ONoC architectures, 3-D integrated technologies an opportunity continue performance improvements with higher integration densities. this paper, we present a mesh-based for MPSoCs, new low-cost nonblocking 4 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML"...

Process flexibility has been widely applied in many industries as a competitive strategy to improve responsiveness demand uncertainty. An important concept is the long chain proposed by Jordan and Graves (1995) [Jordan WC, SC Principles on benefits of manufacturing process flexibility. Management Sci. 41(4):577–594.]. The effectiveness investigated via numerical well theoretical analysis for specific probability distributions random demand. In this paper, we obtain closed form...

Crosstalk noise is an intrinsic characteristic as well a potential issue of photonic devices. In large scale optical networks-on-chips (ONoCs), crosstalk could cause severe performance degradation and prevent ONoC from communicating properly. The novel contribution this paper the systematical modeling analysis signal-to-noise ratio (SNR) routers mesh-based ONoCs using formal method. Formal analytical models for worst-case minimum SNR in are presented. performed at device, router, network...

Optical networks-on-chip (ONoCs) using wavelength-division multiplexing (WDM) technology have progressively attracted more and attention for their use in tackling the high-power consumption low bandwidth issues growing metallic interconnection networks multiprocessor systems-on-chip. However, basic optical devices employed to construct WDM-based ONoCs are imperfect suffer from inevitable power loss crosstalk noise. Furthermore, when employing WDM, signals of various wavelengths can interfere...

Photonic devices are widely used in optical networks-on-chip (ONoCs) and suffer from crosstalk noise. The accumulative noise large scale ONoCs diminishes the signal-to-noise ratio (SNR), causes severe performance degradation, constrains network scalability. For first time, this paper systematically analyzes models worst-case SNR folded-torus-based ONoCs. Formal analytical for presented. analysis is hierarchically performed at basic photonic device level, then router finally level. We...

The performance of multiprocessor systems, such as chip multiprocessors (CMPs), is determined not only by individual processor performance, but also how efficiently the processors collaborate with one another. It communication architecture that determines collaboration efficiency on hardware side. Optical networks-on-chip (ONoCs) are emerging architectures can potentially offer ultra-high bandwidth and low latency to systems. Thermal sensitivity an intrinsic characteristic photonic devices...

Multiprocessor systems-on-chip show a trend toward integration of tens and hundreds processor cores on single chip. With the development silicon photonics for short-haul optical communication, wavelength division multiplexing (WDM)-based networks-on-chip (ONoCs) are emerging on-chip communication architectures that can potentially offer high bandwidth power efficiency. Thermal sensitivity photonic devices is one main concerns about interconnects. We systematically modeled thermal effects in...

This paper studies the optimal resource allocation problem within a multi-agent network composed of both autonomous agents and humans. The main challenge lies in globally coupled constraints that link decisions with those To address this, we propose reformulation transforms these into decoupled local defined over system's communication graph. Building on this incorporating human response model captures human-robot interactions while accounting for individual preferences biases, develop fully...

Optical networks-on-chip (ONoCs) have shown the potential to be substituted for electronic (NoCs) bring substantially higher bandwidth and more efficient power consumption in both on- off-chip communication. However, basic optical devices, which are key components constructing ONoCs, experience inevitable crosstalk noise loss; from devices accumulates large-scale ONoCs considerably hurts signal-to-noise ratio (SNR) as well restricts network scalability. For first time, this paper presents a...

Chip multiprocessor (CMP) is becoming increasingly popular in the processor industry. Efficient network-on-chip (NoC) that has similar performance to cores important CMP design. Fat-tree-based on-chip network many advantages over traditional mesh or torus-based networks terms of throughput, power efficiency, and latency. It a bright future development CMP. However, floorplan design fat-tree-based NoC very challenging because complexity topology. There are large number crossings long...

Manycore processor system is becoming an attractive platform for applications seeking both high performance and energy efficiency. However, huge communication demands among cores, large power density, low process yield will be three significant limitations the scalability of future manycore processors. Breaking a chip into multiple smaller ones can alleviate problems density yield, but would worsen problem efficiency due to limited off-chip bandwidth. In response, we propose inter/intra-chip...

Recently, interchip/intrachip optical interconnection networks have been proposed for ultrahigh-bandwidth and low-latency communications. These employ the microresonators (MRs) to modulate, direct, or detect signal. However, utilized MRs suffer from intrinsic crosstalk noise signal power loss, degrading network efficiency via signal-to-noise ratio (SNR). The amount of loss may differ network. Hence, there exists a need systematically analyze effect issues. In this paper, we developed...

Ethyl caproate is an important flavor substance of Baijiu. It effective to increase the content ethyl improve quality strong-flavor In this study, high-yielding Candida parapsilosis strain F-5 was isolated from pit mud. Under optimized fermentation conditions, achieved yield 53.69 mg/L. A novel strategy employed by adding caproic acid and directly fermented grain. The application in Xiaoqu Baijiu significantly increased 24.86% 17.45%, respectively. Transcriptomic analysis showed that Lip2...

As modern computing systems become increasingly complex, communication efficiency among and inside chips has as important the computation speeds of individual processing cores. Traditionally, to maximize design flexibility, interchip intrachip architectures are separately designed under different constraints. Jointly designing for both could, however, potentially yield better solutions. In this paper, we present a unified inter/intrachip optical network, called UNION, chip multiprocessors...

Abstract There has been rapid growth in on‐demand ride‐hailing platforms that serve as an intermediary to match individual service providers (drivers) with consumer demand (riders). Several major players of this market have introduced carpool services allow passengers heading toward the same direction share a ride at discounted fare. In article, we develop analytical model study pricing issues ride‐sharing presence services, and their economical social implications. We show should be...

As modern computing systems become increasingly complex, communication efficiency among and inside chips has as important the computation speeds of individual processor cores. Traditionally, inter-chip intra-chip architectures are separately designed to maximize design flexibility under different constraints. However, jointly designing for both could potentially yield better solutions. In this paper, we present a unified inter/intra-chip optical network, called UNION, chip multiprocessors...

Network-on-chip (NoC) can improve the performance, power efficiency, and scalability of chip multiprocessors (CMPs). However, traditional NoCs using metallic interconnects consume a significant amount to deliver high communication bandwidth required in near future. Optical are based on CMOS-compatible optical waveguides routers, promise advantages. In this work, we review different designs 5×5 4×4 routers for mesh or torus-based NoCs, compare them cost resources loss. Besides, use 8×8...

With the fast development of processor chips, power-efficient, high-bandwidth, and low-latency interchip interconnects become more important. Studies show that bandwidth traditional parallel with low I/O clock frequencies will bottlenecks in near future. To solve this problem, two types high-bandwidth are developed. Low-swing differential electrical have widely been used high-speed designs. On other hand, optical promise high bandwidth, latency, could improve chip pin performance for...

With the fast development of inter/intra-chip optical interconnects, gap between data rates electrical interconnects and is continuously increasing. Electrical–optical (E-O) interfaces optical–electrical (O-E) are a pair components that convert parallel serial interconnects. This paper holistically models analyzes E-O O-E in terms energy consumption, area, latency. Traditional interfaces, where converted ports by serializers deserializers (SerDes), studied. A new type interface, which...

The performance of multiprocessor systems, such as chip multiprocessors (CMPs), is determined not only by the their processors, but also how efficiently they collaborate with one another. It communication architectures which determine collaboration efficiency on hardware side. Optical networks-on-chip (ONoCs) are emerging that can potentially offer ultra-high bandwidth and low latency to systems. Thermal sensitivity an intrinsic characteristic photonic devices used ONoCs well a potential...