Burrows-Wheeler transform (BWT) has received special attention due to its effectiveness in lossless data compression algorithms. However, implementations of BWT-based algorithms have been limited the complexity suffix sorting process applied input string. Proposed solutions involve structures combined with hardware architectures aimed at reducing computational complexity. advanced are difficult be implemented directly into as they require sophisticated control units. In this paper we present...

Advances in quantum computing have posed a future threat to today’s cryptography. With the advent of these computers, security could be compromised. Therefore, National Institute Standards and Technology (NIST) has issued request for proposals standardize algorithms post-quantum cryptography (PQC), which is considered difficult solve both classical computers. Among proposed technologies, most popular choices are lattice-based (shortest vector problem) hash-based approaches. Other important...

Sine and cosine waves have been used in countless applications; recent research on software defined radio (SDR), digital modalities of sine received special attention. SDR involves highly reconfigurable resources uses generated for modulation demodulation signals. Coordinate rotation computer (CORDIC) is a well known algorithm to approximate iteratively some transcendental functions. In this work, pipelined CORDIC architecture designing flexible scalable generator. An FPGA-based presented...

A linear sorter based on a first-in first-out (FIFO) scheme is presented. It capable of discarding the oldest stored datum and inserting incoming while keeping rest data sorted in single clock cycle. This type can be used as co-processor or module specialized architectures that continuously require to process for non-linear filters order statistics. FIFO sorting described by four different parallel functions exploit natural hardware parallelism. The architecture composed identical processing...

Security is a crucial requirement in the envisioned applications of Internet Things (IoT), where most underlying computing platforms are embedded systems with reduced capabilities and energy constraints. In this paper we present design evaluation scalable low-area FPGA hardware architecture that serves as building block to accelerate costly operations exponentiation multiplication GF(p), commonly required security protocols relying on public key encryption, such agreement, authentication...

The main topic of this paper is low-cost public key cryptography in wireless sensor nodes. Security embedded systems, for example, nodes based on field programmable gate array (FPGA), demands low cost but still efficient solutions. Sensor are elements the Internet Things paradigm, and their security a crucial requirement critical applications sectors such as military, health, industry. To address these requirements under restrictions imposed by available computing resources nodes, presents...

The target detection process in sea clutter background involves the use of different types CFAR (constant false alarm rate) algorithms. These algorithms and their parameters should be configured to obtain maximum probability minimum at current state (Beaufort scale). This paper present an FPGA-architecture for automatic classification based on texture recognition states. allows select appropriate algorithm its process. is centered hardware implementation classification, decision tree. rules...

The actual and next communication schemes tend to use OFDM systems in order provide high baud rates less inter symbol interference. Some examples are 802.11, 802.16, MC-CDMA, digital video broadcasting, wireless USB or firewire among others. Trying a solution the new devices emerging, slow standard adoption, poor spectrum use, etc. Joe Mitola introduced concept of "software defined radio", which involves exhaustive configurable signal processing like FFT, therefore FPGAs could support many...

This work presents a hardware architecture of the ConText steganographic technique in Cyclone II FPGA Altera family. The takes advantage noisy regions and those with abrupt gray levels changes an image where hidden information is very difficult to detect; process locate this region highly repetitive computationally expensive. implemented increase processing speed. implementation results show throughput 61.5 Mbps.

Current and future communication schemes tend to use OFDM systems in order provide high baud rates less inter symbol interference. Some examples are 802.11, 802.16, MC-CDMA, Digital Video Broadcasting, Wireless USB Firewire. Trying a solution the new emerging devices, slow standard adoption poor spectrum use, Joe Mitola introduced concept of "Software Defined Radio" (SDR), which involves exhaustive configurable digital signal processing like FFT. This work presents design, validation FPGA...

A linear sorter based on First In Out (FIFO) scheme is presented. It capable of discarding the oldest value, inserting incoming data while keeping values sorted in a single clock cycle. This type can be used as coprocessor or module specialized architectures for order statistics filtering. The architecture composed identical processing elements thus easily adapted to any length according specific application needs. use compact results high performance yet small architecture. Results...

Reconfigurable architectures are important elements on the design of software radios. Nowadays, diverse platforms being developed to support multiple tasks; these designed specially for different layers OSI (Open System Interconnection) reference model. Specifically, security described in MAC sublayer should be evaluated, which based cryptographic algorithms that require high computational costs. In this work, two proposed AES-CCM hardware IEEE 802.11i-2004 and 802.16e-2005 standards...

Elliptic Curve Cryptography (ECC) is a kind of cryptography that provides the security information services using shorter keys than other known public-key crypto-algorithms without decreasing level. This makes ECC good choice for implementing in constrained devices, like mobile ones. However, diversity implementation parameters recommended by international standards has led to interoperability problems among implementations. work presents design and results novel FPGA coprocessor can be...