A quantitative yield analysis of a latch-type voltage sense amplifier with high-impedance differential input stage is presented. It investigates the impact supply voltage, DC level, transistor sizing, and temperature on offset voltage. The level turns out to be most significant. Also, an analytical expression for sensing delay derived which shows low sensitivity bias figure merit indicates that dc 0.7 V/sub DD/ optimal regarding speed yield. Experimental results in 130-nm CMOS technology...

A highly integrated synchronous buck converter with a predictive dead time control for input voltages >18 V 10 MHz switching frequency is presented. high resolution of ~125 ps allows to reduce dependent losses without requiring body diode conduction evaluate the time. High achieved by compensated sampling node and an 8 bit differential delay chain. Dead parameters are derived in comprehensive study depended losses. This way, efficiency fast DC-DC converters can be optimized eliminating...

Due to superior figures-of-merit (FoMs), gallium nitride (GaN) high-electron mobility transistors (HEMTs) offer a huge potential for high-voltage switching applications in power electronics. Recent developments show trend from board level designs with discrete GaN HEMTs and separate silicon-based drivers [1]-[3] towards monolithic integration of HEMT driver GaN-on-Silicon technology [4], [5]. This has led even better control parasitics along significantly smaller solution size. While offline...

In recent years, significant progress has been made on switched-capacitor DC-DC converters as they enable fully integrated on-chip power management. New converter topologies overcame the fixed input-to-output voltage limitation and achieved high efficiency at densities [1-6]. SC are attractive to not only mobile handheld devices with small input output voltages, but also for conversion in IoE, industrial automotive applications, etc. Such applications need be capable of handling widely...

This paper presents a fully integrated gate driver in 180-nm bipolar CMOS DMOS (BCD) technology with 1.5-A max. current, suitable for normally OFF gallium nitride (GaN) power switches, including gate-injection transistors (GIT). Full-bridge architecture provides and three-level drive voltage robust efficient GaN switching. The concept of high-voltage energy storing (HVES), which comprises an on-chip resonant LC tank, enables very area-efficient buffer capacitor integration superior...

Due to their superior fast-switching performance, GaN transistors show enormous potential enable compact power electronics in applications like renewable energy, electrical cars and home appliances by shrinking down the size of passives. However, fast switching poses challenges for gate driver. Since have a low threshold voltage V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</sub> ~1V, an unintended driver turn-on can occur case unipolar...

Gallium nitride (GaN) transistors enable efficient and compact high-voltage power converters. In the state-of-the-art enhancement mode GaN-on-Si technology, a 650-V transistor is formed as lateral structure enabling monolithic integration with driver analog control circuits on one die. Offline converters show trend toward higher level of integration, shifting from silicon (CMOS) to various levels in GaN technology. this article, monolithic, self-biased buck converter for offline operation...

In recent years, an increasing trend towards GaN integration can be observed, enabled by the lateral structure of technology. A key improvement over a discrete implementation is monolithic gate driver. This tutorial-style paper aims to give insight into design flow. It starts with possibilities technologies in terms IC followed basic driving principles HEMTs. Gate loop requirements and recommendations for driver output stage are explained. flowchart integrated drivers presented boundary...

Grid-powered devices such as desktop computers, displays and TVs, industrial power supplies, 5G infrastructure are experiencing an increasing demand for higher efficiency density. Despite the moderate levels (below 100W), these collectively consume over 10 TWh annually. High energy is key to reducing global usage. Flatter screens smaller computers call more compact interfaces. Both goals favor GaN technology due its low-loss high-frequency switching capability. For grid-powered applications,...

Size and cost of a switched mode power supply can be reduced by increasing the switching frequency. The maximum frequency input voltage range, respectively, is limited minimum propagated on-time pulse, which mainly determined level shifter speed. At frequencies above 10 MHz, conversion with an range up to 50 V output voltages below 5 requires pulse width modulated signal less than ns. This cannot achieved conventional shifters. paper presents circuit, controls NMOS FET on high-voltage domain...

This paper presents a dc-dc converter for integration in the power management unit of an ultra-low microcontroller. The is designed to significantly reduce wake-up energy and startup delay supplied core. use minimized output capacitor key factor save energy. buffered with only 56 nF guarantees stable 1.2 V voltage ripple smaller than 30 mV. controller proposed based on predictive peak current control that allows system transfer at extremely low consumption. circuit implemented 130-nm CMOS...

DC-DC converters for applications like wearables require an ultra-compact and flat module size. Hybrid are a promising converter class that supports integration of inductive capacitive components, while minimizing losses improving power density. Since many these often in sleep mode, high efficiency has to be achieved from low output power. Fully integrated 3-level buck [1, 2] do not maintain good over the full load range, since they operate at switching frequencies, required PWM operation...

A wide-bandwidth galvanically isolated current sensing circuit with an integrated Rogowski coil in 180 nm CMOS is presented. Exploiting the high-frequency properties of optimized on-chip coil, currents can be measured up to a bandwidth 75 MHz. The analog sensor front-end comprises two-stage integrator, which allows chopper frequency below signal bandwidth, resulting 2.2mVrms output noise. An additional Hall extends measurement range towards DC.

For area reasons, NMOS transistors are preferred over PMOS for the pull-up path in gate drivers. Bootstrapping has to ensure sufficient overdrive. Especially high-current drivers with large transistors, bootstrap capacitor is too integration. This paper proposes three options of fully integrated circuits. The key idea that main supported by a second capacitor, which charged higher voltage and ensures high charge allocation when driver turns on. A sizing guideline overall implementation...

The maintenance issue of batteries and the limited power level energy harvesting is addressed by presented integrated micropower supply. Connected to 120/230-VRMS mains, it provides a 3.3-V ac output voltage, suitable for applications such as Internet-of-Things smart homes. supply consists fully ac-dc dc-dc converter with one external low-voltage surface mount device buffer capacitor, resulting in an extremely compact size. Fabricated low-cost 0.35-μm 700-V complimentary...

A wide-bandwidth galvanically isolated current sensor in a 180 nm CMOS technology is presented. It combines two sensing principles for the contactless and lossless measurement power electronic applications. dedicated vertical Hall (low frequencies) an integrated helix-shaped Rogowski coil (high enable to measure currents any line under chip from DC up 15.3 MHz, which exceeds prior art by 5x. Both concepts are fully on one microchip without need kind of magnetics or post-processing. The wide...

With fast switching GaN any parasitic gate loop inductance degrades the performance and may lead to false turn-on as well voltage overshoot. Two approaches overcome these challenges in driving transistors are discussed this paper. In a discrete silicon based driver, is actively utilized for resonant drive approach. second implementation, reduced close zero by GaN-on-Si monolithic integration of power transistor driver on one die. It includes an integrated supply regulator circuit that...

This paper presents a wide-V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">in</sub> step-down parallel-resonant converter (PRC), comprising an integrated 5-bit capacitor array and 300-nH resonant coil, placed in parallel to conventional buck converter. Soft-switching converters are beneficial for high-V multi-MHz reduce dominant switching losses, enabling higher frequencies. The output filter inductor is optimized based on empirical study of...

The level shifter and the floating gate supply for high-side transistors are a major challenge in high-voltage DCDC converters. This paper presents high-speed power-efficient voltages of up to 50 V, suitable both PMOS NMOS power FETs. A switching node falling edge detection allows both, sensitive safe signal detection. enables robust operation during steep dv / dt transitions consumption as low 4.1 pJ per cycle, which is reduction more than 40 % compared prior art. An active clamping circuit...

An integrated synchronous buck converter with a high resolution dead time control for input voltages up to 48V and 10MHz switching frequency is presented. The benefit of an enhanced at light loads enable zero voltage both the high-side low-side switch low output load studied. This way, compact multi-MHz DCDC converters can be implemented efficiency over wide current range. concept also eliminates body diode forward conduction losses minimizes reverse recovery losses. A 125 ps realized by...