Gaël Pillonnet

ORCID: 0000-0003-0539-7185
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About
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Research Areas
  • Innovative Energy Harvesting Technologies
  • Advanced DC-DC Converters
  • Advanced MEMS and NEMS Technologies
  • Semiconductor materials and devices
  • Analog and Mixed-Signal Circuit Design
  • Advancements in Semiconductor Devices and Circuit Design
  • Energy Harvesting in Wireless Networks
  • Advanced Sensor and Energy Harvesting Materials
  • Acoustic Wave Resonator Technologies
  • Wireless Power Transfer Systems
  • Low-power high-performance VLSI design
  • Microbial Fuel Cells and Bioremediation
  • Advanced Power Amplifier Design
  • Electromagnetic Compatibility and Noise Suppression
  • Mechanical and Optical Resonators
  • Advanced Memory and Neural Computing
  • Quantum and electron transport phenomena
  • Advanced Battery Technologies Research
  • Radio Frequency Integrated Circuit Design
  • Multilevel Inverters and Converters
  • Advanced Adaptive Filtering Techniques
  • Quantum Computing Algorithms and Architecture
  • Advancements in PLL and VCO Technologies
  • Silicon Carbide Semiconductor Technologies
  • Supercapacitor Materials and Fabrication

CEA Grenoble
2016-2025

CEA LETI
2016-2025

Commissariat à l'Énergie Atomique et aux Énergies Alternatives
2016-2025

Université Grenoble Alpes
2016-2025

Institut polytechnique de Grenoble
2015-2024

Laboratoire des Technologies de la Microélectronique
2023

CEA Cadarache
2015-2016

Institut des Nanotechnologies de Lyon
2008-2014

Université Claude Bernard Lyon 1
2009-2013

Centre National de la Recherche Scientifique
2013

In the context of high-performance computing, integration more computing capabilities with generic cores or dedicated accelerators for artificial intelligence (AI) application is raising and challenges. Due to increasing costs advanced nodes difficulties shrinking analog circuit input output signals (IOs), alternative architecture solutions single die are becoming mainstream. Chiplet-based systems using 3D technologies enable modular scalable technology partitioning. Nevertheless, there...

10.1109/jssc.2020.3036341 article EN IEEE Journal of Solid-State Circuits 2020-12-10

To reach quantum supremacy, computers need >50 logical qubits with <; mv accurate biasing, GHz-range signal handling, and μs readout of thousands physical at sub-Kelvin temperatures. Silicon-based are a promising approach to scale the qubit number owing their low footprint (100nm) gaining from CMOS industrial background maturity [1]. Moreover, silicon choice allows IC community integrate large-scale qubit-control electronics directly nearby core, thus drastically reducing wire-connection...

10.1109/isscc19947.2020.9063090 article EN 2022 IEEE International Solid- State Circuits Conference (ISSCC) 2020-02-01

Abstract The present work deals with tunable electrical interfaces able to enhance both the harvested power and bandwidth of piezoelectric vibration energy harvesters. aim this paper is propose a general, normalized, unified performance evaluation (with respect bandwidth) various strategies that can tune harvester’s frequency response. By mean thorough analysis, we demonstrate how such influence electromechanical generator response through an electrically-induced damping stiffness. choice...

10.1088/1361-665x/ac54e8 article EN Smart Materials and Structures 2022-02-14

In the context of high-performance computing and big-data applications, quest for performance requires modular, scalable, energy-efficient, low-cost manycore systems. Partitioning system into multiple chiplets 3D-stacked onto large-scale interposers - organic substrate [1], 2.5D passive interposer [2] or silicon bridge [3] -leads to large modular architectures cost reductions in advanced technologies by Known Good Die (KGD) strategy yield management. However, these approaches lack flexible...

10.1109/isscc19947.2020.9062927 article EN 2022 IEEE International Solid- State Circuits Conference (ISSCC) 2020-02-01

This paper presents a fully integrated, self-starting shock-optimized synchronous electric charge extraction (SECE) interface for piezoelectric energy harvesters (PEHs). After introducing model of the electromechanical system under shocks, we prove that SECE is most appropriate electrical to maximize harvested from our PEH. The proposed then presented, both at and transistor levels. Thanks dedicated sequencing, its quiescent current as low 30 nA. makes efficient even time-spaced shocks...

10.1109/jssc.2018.2868299 article EN IEEE Journal of Solid-State Circuits 2018-09-20

Variability of28nm FD-SOI transistors is evaluated for the first time down to ultra low temperatures (UL T), at T= 1 00mK. High performance achieved UL T short channel transistors, with and IOFF below equipment accuracy <; fA, in particular by keeping advantage of forward back biasing (FBB), same efficiency from room temperature (R T) 100mK. The physical origins MOSFET mismatch ULT are studied, highlighting impact charge fluctuations increase on both threshold voltage (VTH) current gain...

10.1109/vlsitechnology18217.2020.9265034 preprint EN 2020-06-01

To enhance the power extraction capability of piezoelectric energy harvesters (PEHs), quality factor mechanical resonators should be maximized over extraction-energy frequency bandwidth (EFB). As a result, EFB is often limited to few percent around resonance frequency, which could dynamically shift with temperature variations and aging. Furthermore, environment vibration frequencies may outside EFB. Currently, PEHs still too narrow make them robust process, temperature, excitation...

10.1109/isscc19947.2020.9062972 article EN 2022 IEEE International Solid- State Circuits Conference (ISSCC) 2020-02-01

10.1109/apec48143.2025.10977487 article EN 2022 IEEE Applied Power Electronics Conference and Exposition (APEC) 2025-03-16

This paper introduces a new electrical strategy for maximizing the energy scavenged from highly coupled and lowly damped piezoelectric harvesters (PEHs). The proposed named Short-circuit synchronous electric charge extraction (SC-SECE) SC phase whose start time ϕs duration Δϕ can be adjusted. control of allows to electrically adapt dynamics electromechanical harvester. In first part, we analytically derive influences on harvester dynamics, prove that they both affect damping induced by...

10.1088/1361-665x/aaf0ea article EN Smart Materials and Structures 2018-11-14

The development of quantum electronic devices operating below a few Kelvin degrees is raising the demand for cryogenic complementary metal-oxide-semiconductor electronics (CMOS) to be used as in situ classical control/readout circuitry. Having minimal spatial separation between and hardware necessary limit electrical wiring room temperature associated heat load parasitic capacitances. Here, we report prototypical demonstrations hybrid circuits combining silicon dot transimpedance amplifier,...

10.1063/5.0007119 article EN cc-by Applied Physics Reviews 2020-12-01

Over the past decade, significant progress in quantum technologies has been made and, hence, engineering of these systems become an important research area. Many researchers have interested studying ways which classical integrated circuits can be used to complement mechanical systems, enabling more compact, performant, and/or extensible than would otherwise feasible. In this article—written by a consortium early contributors field—we provide review some for information sciences. CMOS and...

10.1109/tqe.2023.3290593 article EN cc-by-nc-nd IEEE Transactions on Quantum Engineering 2023-01-01

One of the main challenges in energy harvesting from ambient vibrations is to find efficient ways scavenge energy, not only at mechanical system resonance but also on a wider frequency band. Instead tuning part system, as usually proposed state art, this article develops extensively possibility tune properties harvester using electrical interface. Due progress materials, piezoelectric harvesters can exhibit relatively high electromechanical coupling: hence, now have substantial influence...

10.1177/1045389x18810802 article EN Journal of Intelligent Material Systems and Structures 2018-11-18

In the standard MOSFET description of drain current $I_{D}$ as a function applied gate voltage $V_{GS}$, subthreshold swing $SS(T)\equiv dV_{GS}/d\log I_{D}$ has fundamental lower limit temperature $T$ given by $SS(T) = \ln10~k_BT/e$. However, recent low-temperature studies different advanced CMOS technologies have reported $SS$(4K or lower) values that are at least an order magnitude larger. Here, we present and analyze saturation $SS(T)$ in 28nm fully-depleted silicon-on-insulator (FD-SOI)...

10.1109/led.2019.2903111 article EN IEEE Electron Device Letters 2019-03-05

Extensive electrical characterization of ring oscillators (ROs) made in high-κ metal gate 28-nm fully depleted silicon-on-insulator technology is presented for a set temperatures between 296 and 4.3 K. First, delay per stage (τ <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">P</sub> ), static current (I xmlns:xlink="http://www.w3.org/1999/xlink">STAT</sub> dynamic xmlns:xlink="http://www.w3.org/1999/xlink">DYN</sub> ) are analyzed the case...

10.1109/ted.2018.2859636 article EN IEEE Transactions on Electron Devices 2018-08-23

This paper presents an inductor-less start-up converter for a sub-100-mV energy harvester based on Armstrong oscillator topology using piezoelectric transformer and normally ON MOSFET. Two models of the have been detailed validated experimentally phase steady-state operation to, respectively, determine minimum input voltage gain. The in setup associating thermoelectric generator. Based Rosen-type off-the-shelf components, proposed begins to oscillate at 15 mV achieves 1-V output only 43 mV....

10.1109/tpel.2017.2690804 article EN IEEE Transactions on Power Electronics 2017-04-04

Although CMOS technology scaling combined with efficient frequency and voltage strategies offer femto Joule per logic operation, energy consumption remains orders of magnitude above the limit given by information theory. To alleviate this inherent dissipation, paper introduces a new paradigm: adiabatic capacitive logic. Based on principle also relies smooth capacitance modulation to achieve quasi zero-power dissipation. This method limits leakage using metal-metal junctions instead...

10.1109/iscas.2017.8050996 preprint EN 2022 IEEE International Symposium on Circuits and Systems (ISCAS) 2017-05-01

published or not.The documents may come from teaching and research institutions in France abroad, public private centers.L'archive ouverte pluridisciplinaire

10.1166/jolpe.2018.1562 article EN Journal of Low Power Electronics 2018-06-01

This paper presents an analytical method to evaluate pertinent data of the resonant capacitive switching converter, especially voltage gain and power efficiency. Instead long transient simulation time, proposed model uses frequency decomposition speed-up computation. is valid for <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i> -phase operation, extends recently published studies on this promising topology outside zero-current/voltage...

10.1109/tpel.2015.2453258 article EN IEEE Transactions on Power Electronics 2015-07-08

This paper presents an energy harvesting interface called Short Circuit Synchronous Electric Charge Extraction (SC-SECE), which is improvement of the SECE for highly coupled piezoelectric generators. The SC-SECE based on control a short-circuit through two tuning parameters. first one, Φ <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">S</sub> , represents phase between displacement extrema and event. second, ΔΦ, angle difference beginning end...

10.1109/iscas.2018.8351559 article EN 2022 IEEE International Symposium on Circuits and Systems (ISCAS) 2018-01-01

Piezoelectric Energy Harvesters (PEHs) are usually used to convert mechanical energy (vibration, shocks) into electrical energy, in order supply energy-autonomous sensor nodes industrial, biomedical or domotic applications. Non-linear extraction strategies such as Synchronous Electrical Charge Extraction (SECE) [1,2], investing [3], and Synchronized Switch Harvesting on Inductor (SSHI) [4] have been developed maximize the extracted from harmonic excitations. However, most of today's...

10.1109/isscc.2018.8310228 article EN 2022 IEEE International Solid- State Circuits Conference (ISSCC) 2018-02-01

We report the observation at low temperature of a hump in linear transfer characteristic thin film fully depleted silicon-on-insulator transistor when positive bias is applied on back gate under buried oxide. This decrease current correlated with transition from one-subband to two-subband conduction. Electron mobility measurements and calculations are good agreement occurrence intersubband scattering carrier transport two-dimensional inversion layer.

10.1063/5.0007100 article EN Applied Physics Letters 2020-06-15
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