Careful design and verification of the power distribution network a chip are critical importance to ensure its reliable performance. With increasing number transistors on chip, size has grown so large as make task very challenging. The available computational memory resources impose limitations networks that can be analyzed using currently known techniques. Many today's designs have too in traditional way flat networks. In this paper, we propose hierarchical analysis technique overcome...

Process variation has become a significant concern for static timing analysis. In this paper, we present new method path-based statistical We first propose modeling inter- and intra-die device length variations. Based on model, then an efficient computing the total path delay probability distribution using combination of enumeration inter-die analytical approach variation. also simple effective model spatial correlation The analysis is extended to include correlation. test proposed methods...

Careful design and verification of the power distribution network a chip are critical importance to ensure its reliable performance. With increasing number transistors on chip, size has grown so large as make task very challenging. The available computational memory resources impose limitations networks that can be analyzed using currently known techniques. Many today's designs have too in traditional way flat networks. In this paper, we propose hierarchical analysis technique overcome...

The existence of positive solutions for a class fractional equations involving the Riemann–Liouville derivative with integral boundary conditions is investigated. By means monotone iteration method and some inequalities associated Green function, we obtain solution establish iterative sequence approximating solution.

This paper presents a class of power grid analysis and optimization techniques, all which are based on the algebraic-multigrid (AMG) method. First, new AMG-based reduction scheme is proposed to improve efficiency reducing problem size for optimization. Next, with technique, fast transient-analysis method developed extended an accurate solver error control mechanism. After that, scope this further broadened handling modified grid. Finally, decap-allocation (DA) AMG suggested. Experimental...

Process variation has become a significant concern for static timing analysis. In this paper, we present new method path-based statistical We first propose modeling inter- and intra-die device length variations. Based on model, then an efficient computing the total path delay probability distribution using combination of enumeration inter-die analytical approach variation. also simple effective model spatial correlation The analysis is extended to include correlation. test proposed methods...

Abstract This article addresses the path‐planning problem for a mobile manipulator system that is used to perform sequence of tasks specified by locations and minimum oriented force capabilities. The find an optimal base positions configurations performing given series task specifications. formulation nonlinear. feasible regions are nonconvex unconnected. Genetic algorithms applied such problems appear be very promising while traditional optimization methods cause difficulties. Computer...

With operating frequencies approaching the gigahertz range, inductance is becoming an increasingly important consideration in design and analysis of on-chip interconnect. In this paper, we give a tutorial overview issues related to effects.We explain complexity current flow VLSI circuits. We discuss applicability PEEC approach detailed circuit model signal power grid interconnect, switching devices, pads package. Fur-ther, techniques that can be used speed-up simulation large model. then...

The present paper is concerned with the infimum of norm potentials for Sturm–Liouville eigenvalue problems Dirichlet boundary condition such that first two eigenvalues are known. explicit quantity given by eigenvalues.

Magnetic microrobots have tremendous potential applications due to their wireless actuation and fast response in confined spaces. Herein, inspired by fish, a magnetic microrobot working at liquid surfaces was proposed order transport microparts effectively. Different from other fish-like robots propelled flexible caudal fins, the is designed as simple sheet structure with streamlined shape. It fabricated monolithically utilizing polydimethylsiloxane doped particles. The unequal thicknesses...

Microrobots working at liquid surfaces have immense potential for micromanipulation in tight and enclosed spaces, whereas constructing agile functional microrobots with simple structures is a great challenge. Herein, pair of magnetic circular microdisks as partners ethylene glycol (EG) are proposed order to accomplish flexible locomotion situ tasks. The can be controlled connect separate by modulating the orientation applied field. After two disks an entity, they transformed into...

Domino logic is a popular configuration for implementing high-speed circuits. An algorithm domino mapping, under parameterized library style, presented. Practical design methods, such as the use of multi-output and wide gates, are incorporated within technology mapping framework. The technique can handle large circuits with small computational overheads, shows improvements up to about 37% over existing methods.

We propose a novel and efficient charge-based decoupling capacitance budgeting algorithm. Our method uses the macromodeling technique effective radius of to reduce size problem. formulate nonlinear optimization into linear program (LP) by integrating nodal equations across time period interest through certain approximations. To error caused linearization, we do multiple iterations program. Experimental results demonstrate that, with proposed algorithm, even very large power networks (eg. 5...

Power delivery networks of VLSI chips require adequate input supply connections to ensure reliable performance. This paper addresses the problem finding an optimum set pads, pins, and on-chip voltage regulators, their placement in a given power network, subject constraints on drops network maximum currents through pins regulators. The is modeled as mixed integer linear program using macromodeling techniques several heuristic are proposed make tractable. effectiveness demonstrated real...

As VLSI technology enters the ultra-deep submicron era, wire coupling capacitance starts to dominate self and can no longer be neglected in timing driven routing. In this paper, a aware track routing heuristic is proposed. Given global solution constraint for each net, major trunks of segments are assigned tracks such that minimum slack among all nets maximized. Delay penalties from both detour considered unified graph model. The core problem formulated solved as Sequential Ordering Problem...

Clock meshes posses inherent low clock skews and excellent immunity to PVT variations, have increasingly found their way high-performance IC designs. However, analysis of such massively coupled networks is significantly hindered by the sheer size network tight coupling between non-tree interconnects large numbers drivers. The presented Harmonic-weighted model order reduction algorithm motivated key observation steady-state operation networks, its efficiency facilitated locality via port...

In ultra-deep submicron technology, crosstalk noise is so severe that avoidance merely in detailed routing not adequate and it has to be considered earlier design stages. this paper, we propose two heuristics for mitigation layer assignment, which a stage between global routing, subsequent can more attainable. The pre-detailed-routing estimated through probabilistic model. constraint on the amount of vias also considered. Experimental results benchmark circuits confirm effectiveness proposed...

This article addresses the path-planning problem for a mobile manipulator system that is used to perform sequence of tasks specified by locations and minimum oriented force capabilities. The find an optimal base positions configurations performing given series task specifications. formulation nonlinear. feasible regions are nonconvex unconnected. Genetic algorithms applied such problems appear be very promising while traditional optimization methods cause difficulties. Computer simulations...

This paper studies the small signal stability of microgrids in autonomous operation with droop control. A special power flow algorithm is employed to calculate equilibrium point (EP) a microgrid. The dynamic model microgrid linearized at different EPs which are influenced by coefficients. system eigenvalues compared those obtained other methods, fixed EP. Comparison results show that neglecting impact EP change will lead either optimistic or conservative conclusions. security region (SSSR)...

On-chip power distribution networks are resistive in nature and hence create large variations the voltage levels across chip. These have significant impact on delays of global signals, such as clock, which span entire A clock network that is balanced without considering delay induced by supply can suffer degradation its skew during chips operation. In this paper, we describe a practical approach to determining worst-case presence variations. Experiments using proposed nets several processors...

Power-distribution networks of very large-scale integrated (VLSI) chips should be designed carefully to ensure reliable performance. A sound power network requires an adequate number power-supply input connections (pads and pins). Placing them at the best vantage locations helps reduce supply necessary for obtaining quality distribution. This paper addresses problem finding optimum set pads, pins, on-chip voltage regulators, their placement in a given network, subject constraints on drops...

Clock meshes have found increasingly wide applications in today's high-performance IC designs. The inherent routing redundancies associated with clock lead to improved skews and reliability. However, the high complexity of modern chip designs has made its verification very challenging. A typical distribution network may consist millions coupled/interconnected linear elements hundreds nonlinear drivers attached at different locations on mesh. Such a large is often too complex for feasible...

In this paper two problems on domino logic synthesis are addressed. A mapping method that maps the complementary cones independently when AND/OR is to be implemented and together using dual-monotonic gates in case of XOR/XNOR logic, proposed. The results show up 28.9% improvement area always same or better performance delay over existing approaches. Then a 0-1 integer programming formulation provided for output phase assignment problem logic. It considers cost difference between polarities...

In this paper, a new structural matching algorithm for technology mapping is proposed. The based on key observation that the matches node in subject Boolean network are related to its children. relationships between library cells modeled using lookup table. proposed method fast, has low memory usage, and easy implement. Experimental results show speedups of 20x over Matsunaga's fast approach, orders magnitude SIS, with same or slightly better results, much lower utilization.