A5009154798- Security and Verification in Computing
- Advanced Memory and Neural Computing
- Diamond and Carbon-based Materials Research
- Radiation Effects in Electronics
- Network Security and Intrusion Detection
- Physical Unclonable Functions (PUFs) and Hardware Security
- Real-Time Systems Scheduling
- Parallel Computing and Optimization Techniques
- Cloud Data Security Solutions
- Semiconductor materials and devices
- Advanced Malware Detection Techniques
- Cloud Computing and Resource Management
- Embedded Systems Design Techniques
Technical University of Darmstadt
2021-2024
Friedrich-Alexander-Universität Erlangen-Nürnberg
2020
Shared cache resources in multi-core processors are vulnerable to side-channel attacks. Recently proposed defenses have their own caveats: Randomization-based the evolving attack algorithms besides relying on weak cryptographic primitives, because they do not fundamentally address root cause for Cache partitioning defenses, other hand, provide strict resource and effectively block all threats. However, usually rely way-based which is fine-grained cannot scale support a larger number of...
The rise in the development of complex and application-specific commercial open-source hardware shrinking verification time are causing numerous hardware-security vulnerabilities. Traditional techniques limited both scalability completeness. Research this direction is hindered due to lack robust testing benchmarks. In paper, collaboration with our industry partners, we built an ecosystem mimicking hardware-development cycle where inject bugs inspired by real-world vulnerabilities into RISC-V...
Modern security architectures provide Trusted Execution Environments (TEEs) to protect critical data and applications against malicious privileged software in so-called enclaves. However, the seamless integration of existing TEEs into cloud is hindered, as they require substantial adaptation executing inside an enclave well management handle enclaved workloads. We tackle these challenges by presenting VirTEE, first TEE architecture that allows strongly isolated execution unmodified virtual...
Microarchitectural attacks represent a challenging and persistent threat to modern processors, exploiting inherent design vulnerabilities in processors leak sensitive information or compromise systems. Of particular concern is the susceptibility of Speculative Execution, fundamental part performance enhancement, such attacks. We introduce Specure, novel pre-silicon verification method composing hardware fuzzing with Information Flow Tracking (IFT) address speculative execution leakages....
Emerging applications, like cloud services, are demanding more computational power, while also giving rise to various security and privacy challenges. Current multi-/many-core chip designs boost performance by using Networks-on-Chip (NoC) based architectures. Although NoC-based architectures significantly improve communication concurrency, they have thus far lack adequate mechanisms such as enforceable process isolation. On the other hand, new security-aware that protect applications...
Shared cache resources in multi-core processors are vulnerable to side-channel attacks. Recently proposed defenses have their own caveats: Randomization-based the evolving attack algorithms besides relying on weak cryptographic primitives, because they do not fundamentally address root cause for Cache partitioning defenses, other hand, provide strict resource and effectively block all threats. However, usually rely way-based which is fine-grained cannot scale support a larger number of...