A5054038123- Parallel Computing and Optimization Techniques
- Radiation Effects in Electronics
- Advanced Data Storage Technologies
- Superconducting Materials and Applications
- Reliability and Maintenance Optimization
- Semiconductor materials and devices
- Adversarial Robustness in Machine Learning
- Particle accelerators and beam dynamics
- Distributed and Parallel Computing Systems
- Atomic and Subatomic Physics Research
- Recycling and Waste Management Techniques
- Integrated Circuits and Semiconductor Failure Analysis
- Management and Optimization Techniques
Intel (United States)
2022-2023
Intel (United Kingdom)
2023
Chips pack ever more, smaller transistors. Fault rates increase in turn and become more concerning, particularly at the scale of <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">High-Performance Computing</i> (HPC) systems: on one hand, hardware fault protection is costly - than 10% silicon area for floating-point units; other, HPC users expect correct application output after anticipated time computation, but workloads are seldom...
This article presents an application program interface (API)-based hardware fault simulation method to investigate the effect of faults on failure probability deep neural network (DNN) accelerators. —Fei Su, Intel Corporation
The effectiveness of a comprehensive maintenance and reliability management process can be assessed through an in-depth analysis various factors that, collectively, represent the contribution to operational production processes industrial asset. There are no simple formulas for designing integrated model within asset framework (in accordance with ISO 55001 standard), nor there fixed or universal rules that apply equally all assets over time. In light this, primary goal this article is...
In their quest for exascale and beyond, High-Performance Computing (HPC) systems continue becoming ever larger more complex. Application developers, on the other hand, leverage novel methods to improve efficiency of own codes: a recent trend is use floating-point mixed precision, or careful interlocking single- double-precision arithmetic, as tool performance well reduce network memory boundedness. However, while it known that modern HPC suffer hardware faults at daily rates, impact reduced...