- Low-power high-performance VLSI design
- Radiation Effects in Electronics
- Parallel Computing and Optimization Techniques
- Energy Harvesting in Wireless Networks
- Advanced Battery Technologies Research
- Advanced Memory and Neural Computing
- Opportunistic and Delay-Tolerant Networks
- Energy Efficient Wireless Sensor Networks
- Embedded Systems Design Techniques
- Innovative Energy Harvesting Technologies
- Context-Aware Activity Recognition Systems
- Distributed systems and fault tolerance
- Ferroelectric and Negative Capacitance Devices
- Advancements in Semiconductor Devices and Circuit Design
- IoT and Edge/Fog Computing
- Experimental Learning in Engineering
- Security and Verification in Computing
- Modular Robots and Swarm Intelligence
- Interconnection Networks and Systems
- Design Education and Practice
- Innovative Human-Technology Interaction
- Neural dynamics and brain function
- VLSI and Analog Circuit Testing
- Healthcare Technology and Patient Monitoring
- Systems Engineering Methodologies and Applications
Iowa State University
2017-2024
University of Illinois Urbana-Champaign
2012-2017
University of Illinois System
2016-2017
University of Wisconsin–Madison
2012
High-throughput and low-latency sorting is a key requirement in many applications that deal with large amounts of data. This paper presents efficient techniques for designing high-throughput, units. Our architectures utilize modular design hierarchically construct units from smaller building blocks. The are optimized situations which only the M largest numbers N inputs needed, because this situation commonly occurs scientific computing, data mining, network processing, digital signal...
Due to their large memory capacities, many modern servers require chipkill correct, an advanced type of error detection and correction, meet reliability requirements. However, existing chipkill-correct solutions incur high power or storage overheads, both because they use dedicated error-correction resources per codeword perform correction. This requires overhead for correction results in detection. We propose a novel solution, multi-line that uses shared across multiple lines reduce the Our...
A large number of emerging applications such as implantables, wearables, printed electronics, and IoT have ultra-low area power constraints. These rely on ultra-low-power general purpose microcontrollers microprocessors, making them the most abundant type processor produced used today. While processors several advantages, amortized development cost across many applications, they are significantly over-provisioned for area- power-constrained systems, which tend to run only one or a small over...
Bitcoin is the most popular cryptocurrency today. A bedrock of framework mining, a computation intensive process that used to verify transactions for profit. We observe mining inherently error tolerant due its embarrassingly parallel and probabilistic nature. exploit this inherent tolerance inaccuracy by proposing approximate circuits trade off reliability with area delay. These can then be operated at Better Than Worst-Case (BTWC) enable further gains. Our results show approximation has...
Abstract Personas and journey maps are ubiquitous in many design disciplines. These tools allow designers to better understand key users engage with a user's experience over time product or system. While personas widely used disciplines, little scholarship exists on how they, collectively, might be successfully adapted different contexts, e.g., engineering instruction course development. Yet, these have the potential help educators students' experiences during learning activity, class...
The reliability of on-chip memories (e.g., caches) determines their minimum operating voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">min</sub> ) and, therefore, the power these consume. A strong error correction mechanism can be used to tolerate increasing memory cell failure rate as supply is reduced. However, often incurs a high latency relative access time. We propose prediction where fast predicts result hide long correction....
Voltage scaling can effectively reduce processor power, but also reduces the reliability of SRAM cells in on-chip memories. Therefore, it is often accompanied by use an error correcting code (ECC). To enable reliable and efficient memory operation at low voltages, ECCs for memories must provide both high coverage correction latency. In this paper, we propose pattern transformation, a novel low-latency technique that allows to be scaled voltages lower than what has been previously possible....
Voltage scaling can effectively reduce processor power, but also reduces the reliability of SRAM cells in on-chip memories. Therefore, it is often accompanied by use an error correcting code (ECC). To enable reliable and efficient memory operation at low voltages, ECCs for memories must provide both high coverage correction latency. In this paper, we propose pattern transformation, a novel low-latency technique that allows to be scaled voltages lower than what has been previously possible....
Many emerging applications such as IoT, wearables, implantables, and sensor networks are power- energy-constrained. These rely on ultra-low-power processors that have rapidly become the most abundant type of processor manufactured today. In embedded systems used by these applications, peak power energy requirements primary factors determine critical system characteristics, size, weight, cost, lifetime. While tend to be application-specific, conventional techniques for rating cannot...
The growing movement to connect literally everything the internet (internet of things or IoT) through ultra-low-power embedded microprocessors poses a critical challenge for information security. Gate-level tracking flows has been proposed guarantee flow security in computer systems. However, such solutions rely on non-commodity, secure-by-design processors. In this work, we observe that need processors arises because previous works gate-level assume no knowledge application running system....
It is well-known that a significant fraction of server power consumed in memory; this especially the case for servers with chipkill correct memories. We propose new memory organization decouples correction errors due to local faults affect single symbol word from device-level an entire column, sub-bank, or device. By using combination two codes separately target these fault modes, proposed reduces code overhead by half as compared conventional memories same rank size. Alternatively, allows...
Batteryless sensing devices powered solely by ambient energy sources are expected to operate in an intermittent manner, since they do not have a predictable, or even continuous, supply. When such system is off, it cannot keep track of time using conventional means. However, continuous sense critical for any running real-time time-sensitive applications. In this paper, we present HARC (Heterogeneous Array Redundant Persistent Clocks), novel solution the problem timekeeping batteryless,...
Many emerging applications such as the Internet of Things, wearables, implantables, and sensor networks are constrained by power energy. These rely on ultra-low-power processors that have rapidly become most abundant type processor manufactured today. In embedded systems used these applications, peak energy requirements primary factors determine critical system characteristics, size, weight, cost, lifetime. While tend to be application specific, conventional techniques for rating cannot...
The increasingly-stringent power and energy requirements of emerging embedded applications have led to a strong recent interest in aggressive gating techniques. Conventional techniques for perform module-based processors, where domains correspond RTL modules. We observe that there can be significant benefits from module-oblivious gating, include an arbitrary set gates, possibly multiple However, since it is not possible infer the activity software alone, conventional software-based...
Batteryless energy-harvesting sensor nodes can operate indefinitely, but if the harvesting rate is too low, they must intermittently. Intermittent operation imposes various challenges upon system. One of least-studied communication–if are unpowered for long, unpredictable periods time, how reliably communicate with each other? In prior work, we proposed concept lifecycle management protocols (LMPs) to mitigate this issue and enable wireless communication directly between intermittent using...
Batteryless systems offer promising platforms to support pervasive, near-sensor intelligence in a sustainable manner. These solely rely on ambient energy sources that often provide limited power. One common approach designing batteryless is using intermittent execution---a node banks into capacitive store until threshold voltage met and the digital components turn consume banked depleted they die. The amount of available demands development application- domain-specific accelerators achieve...
The emergence of the Internet things (IoT) brings a new paradigm ubiquitous sensing and computing. Yet as an increasing number wireless IoT devices are deployed, powering them with batteries becomes expensive unsustainable. Batteryless systems harvesting energy from ambient environment offer promising solution to this problem. However, due unpredictability sources relatively weak strength, these may operate intermittently, presenting series unique challenges above beyond traditional...
A large number of emerging applications such as implantables, wearables, printed electronics, and IoT have ultra-low area power constraints. These rely on ultra-low-power general purpose microcontrollers microprocessors, making them the most abundant type processor produced used today. While processors several advantages, amortized development cost across many applications, they are significantly over-provisioned for area- power-constrained systems, which tend to run only one or a small over...
Many emerging applications such as IoT, wearables, implantables, and sensor networks are power- energy-constrained. These rely on ultra-low-power processors that have rapidly become the most abundant type of processor manufactured today. In embedded systems used by these applications, peak power energy requirements primary factors determine critical system characteristics, size, weight, cost, lifetime. While tend to be application-specific, conventional techniques for rating cannot...
Two classes of intermittency have emerged in the batteryless intermittent research community: hard and soft inter-mittency. While conceptually similar, these two intermittencies represent very different approaches to problem. In this position paper, we examine detail. We discuss tradeoffs evaluate performance potential context communication between nodes. Finally, conclude that both types merits under conditions application requirements, argue for greater understanding how disparate may...
Abstract In recent years, several researchers and educators have explored how design thinking might be applied to education practices. These explorations ranged from general use toolkits theoretical framings empirical investigations. While these advanced considerations of the human-centered, inquisitive, iterative, generative, multi-perspective nature inform improve practice, it is also clear that thinking, as has been in other disciplines contexts, can met with resistance struggles when...