- Cryptography and Residue Arithmetic
- Cryptography and Data Security
- Quantum Computing Algorithms and Architecture
- CCD and CMOS Imaging Sensors
- Image and Signal Denoising Methods
- Adversarial Robustness in Machine Learning
- Human Pose and Action Recognition
- Advanced Neural Network Applications
- Physical Unclonable Functions (PUFs) and Hardware Security
- Big Data and Digital Economy
- Image Enhancement Techniques
- Chaos-based Image/Signal Encryption
Pohang University of Science and Technology
2022-2024
Fully homomorphic encryption (FHE) has been gaining significant attention as a privacy-preserving solution for emerging server systems with critical information, which allows the to perform various primitive computations on encrypted data from clients without decrypting original messages shown in Fig. 16.1.1 [3–6]. Among FHE candidates, based ring learning error (RLWE) problem, recent CKKS approach using residue number system (RNS) is regarded most promising method [4–6]. For an n-slot user...
This paper presents an advanced offline scheduling scheme to improve the accelerator efficiency, especially for highly-pruned convolutional neural networks (HP-CNNs). Based on existing outlier-aware design, we demonstrate efficiency drop of HP-CNN processing first time, and element-wise channel merging is proposed make a dense sequence even model. The dedicated hardware architecture also presented process merged channels with minimum hardware-level overheads, improving energy handling...
In this paper, we present an advanced algorithm-hardware co-optimization method for designing efficient accelerator architecture image signal processing (ISP) with deep neural networks (DNNs). Based on the systolic-array structure, performing target network model, newly introduce two evaluation metrics, each of which is dedicated to fairly representing either speed or energy consumption. Then, overall metric defined test systolic array, finding initial array configuration given number total...
This paper proposes a hardware estimator for accelerating number theoretic transform (NTT) fast polynomial operations in the ring learning with error (RLWE) based homomorphic encryption (HE). By modifying of unit processing elements, modulus bit-width, and residue system (RNS) parameters, we present systematic way rapidly calculating complexity without realizing target accelerator. Compared actual synthesis results 28nm CMOS technology, experimental show that proposed work successfully...