Juha Plosila

ORCID: 0000-0003-4018-5495
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About
Contact & Profiles
Research Areas
  • Interconnection Networks and Systems
  • Parallel Computing and Optimization Techniques
  • Embedded Systems Design Techniques
  • Advanced Memory and Neural Computing
  • Low-power high-performance VLSI design
  • Supercapacitor Materials and Fabrication
  • 3D IC and TSV technologies
  • Robotic Path Planning Algorithms
  • Formal Methods in Verification
  • Radiation Effects in Electronics
  • IoT and Edge/Fog Computing
  • Distributed Control Multi-Agent Systems
  • Real-Time Systems Scheduling
  • UAV Applications and Optimization
  • Cloud Computing and Resource Management
  • Semiconductor materials and devices
  • VLSI and Analog Circuit Testing
  • Distributed and Parallel Computing Systems
  • Software-Defined Networks and 5G
  • CCD and CMOS Imaging Sensors
  • Advancements in Battery Materials
  • Robotics and Sensor-Based Localization
  • VLSI and FPGA Design Techniques
  • Modular Robots and Swarm Intelligence
  • Analog and Mixed-Signal Circuit Design

University of Turku
2015-2024

Lappeenranta-Lahti University of Technology
2020

Information Technology University
2006-2015

Indian Institute of Technology Delhi
2014

Turku Centre for Computer Science
2003-2014

KTH Royal Institute of Technology
2014

Research Council of Finland
2007-2012

Turku University of Applied Sciences
2002-2003

The Timepix3, hybrid pixel detector (HPD) readout chip, a successor to the Timepix \cite{timepix2007} can record time-of-arrival (ToA) and time-over-threshold (ToT) simultaneously in each pixel. ToA information is recorded 14-bit register at 40 MHz be refined by further 4 bits with nominal resolution of 1.5625 ns (640 MHz). ToT 10-bit overflow controlled counter MHz. Pixels programmed 14 integral 10 event counting, both chip designed 130 nm CMOS contains 256 × channels (55 55 μm2). which has...

10.1088/1748-0221/9/05/c05013 article EN Journal of Instrumentation 2014-05-13

High energy consumption of cloud data centers is a matter great concern. Dynamic consolidation Virtual Machines (VMs) presents significant opportunity to save in centers. A VM approach uses live migration VMs so that some the under-loaded Physical (PMs) can be switched-off or put into low-power mode. On other hand, achieving desired level Quality Service (QoS) between providers and their users critical. Therefore, main challenge reduce while satisfying QoS requirements. In this paper, we...

10.1109/tsc.2014.2382555 article EN IEEE Transactions on Services Computing 2014-12-29

The unmanned aerial vehicles or drones come in a great diversity depending upon the basic frameworks with their particular specifications. purpose of this study is to analyse core characteristics swarming and measure public awareness levels respect these swarms. To achieve goals, functionality, problems, importance are highlighted. results an experimental survey from bunch academic population also presented, which demonstrate that swarms fundamental future agenda will be adopted passage time.

10.1016/j.jii.2019.100106 article EN cc-by Journal of Industrial Information Integration 2019-10-05

Moving towards autonomy, unmanned vehicles rely heavily on state-of-the-art collision avoidance systems (CAS). A lot of work is being done to make the CAS as safe and reliable possible, necessitating a comparative study recent in this important area. The paper provides comprehensive review strategies used for vehicles, with main emphasis aerial (UAV). It an in-depth survey different techniques that are categorically explained along analysis considered approaches w.r.t. scenarios technical...

10.1109/access.2020.3000064 article EN cc-by IEEE Access 2020-01-01

The development of a navigation system is one the major challenges in building fully autonomous platform. Full autonomy requires dependable capability not only perfect situation with clear GPS signals but also situations, where unreliable. Therefore, self-contained odometry systems have attracted much attention recently. This paper provides general and comprehensive overview state art field self-contained, i.e., denied systems, identifies out-coming that demand further research future....

10.1109/access.2019.2929133 article EN cc-by IEEE Access 2019-01-01

Virtualization is a vital technology of cloud computing which enables the partition physical host into several Virtual Machines (VMs). The number active hosts can be reduced according to resources requirements using live migration in order minimize power consumption this technology. However, Service Level Agreement (SLA) essential for maintaining reliable quality service between data centers and their users environment. Therefore, reduction SLA violation level costs are considered as two...

10.1109/seaa.2013.23 article EN 2013-09-01

Virtual Machine (VM) consolidation provides a promising approach to save energy and improve resource utilization in data centers. Many heuristic algorithms have been proposed tackle the VM as vector bin-packing problem. However, existing focused mostly on number of active Physical Machines (PMs) minimization according their current requirements neglected future demands. Therefore, they generate unnecessary migrations increase rate Service Level Agreement (SLA) violations To address this...

10.1109/tcc.2016.2617374 article EN IEEE Transactions on Cloud Computing 2016-10-19

Dynamic consolidation techniques optimize resource utilization and reduce energy consumption in Cloud data centers. They should consider the variability of workload to decide when idle or underutilized hosts switch sleep mode order minimize consumption. In this paper, we propose a Reinforcement Learning-based Consolidation method (RL-DC) number active according current resources requirement. The RL-DC utilizes an agent learn optimal policy for determining host power by using popular...

10.1109/pdp.2014.109 article EN 2014-02-01

Dynamic Virtual Machine (VM) consolidation is one of the most promising solutions to reduce energy consumption and improve resource utilization in data centers. Since VM problem strictly NP-hard, many heuristic algorithms have been proposed tackle problem. However, existing works deal only with minimizing number hosts based on their current these do not explore future requirements. Therefore, unnecessary migrations are generated rate Service Level Agreement (SLA) violations increased To...

10.1109/cloud.2015.58 article EN 2015-06-01

We propose link structures for NoC that have properties tolerating efficiently transient, intermittent, and permanent errors. This is a necessary step to be taken in order implement reliable systems future nanoscale technologies. The protection against transient errors realized using Hamming coding interleaving error detection retransmission as the recovery method. introduce two approaches tackling intermittent In first approach, spare wires are introduced together with reconfiguration...

10.1155/2007/94676 article EN VLSI design 2007-05-07

Stochastic hill climbing algorithm is adapted to rapidly find the appropriate start node in application mapping of network-based many-core systems. Due highly dynamic and unpredictable workload such systems, an agile run-time task allocation scheme required. The desired map tasks incoming at onto optimum contiguous area available nodes. Contiguous un-fragmented settle communicating close proximity. Hence, power dissipation, congestion between different applications, latency system will be...

10.1145/2463209.2488782 article EN 2013-05-28

The occurrence of congestion in on-chip networks can severely degrade the performance due to increased message latency. In mesh topology, minimal methods propagate messages over two directions at each switch. When shortest paths are congested, sending more through them deteriorate condition considerably. this paper, we present an adaptive routing algorithm for that provide a wide range alternative between pair source and destination switches. Initially, determines all permitted turns network...

10.1109/nocs.2012.10 article EN 2012-05-01

In this paper, we propose a dynamic virtual machine consolidation algorithm to minimize the number of active physical servers on data center in order reduce energy cost. The proposed method uses k-nearest neighbor regression predict resource usage each host. Based prediction utilization, can determine (i) when host becomes over-utilized (ii) under-utilized. Experimental results real workload traces from more than thousand Planet Lab machines show that technique minimizes consumption and...

10.1109/ucc.2013.51 article EN 2013-12-01

Combining the benefits of 3D ICs and Networks-on-Chip (NoCs) schemes provides a significant performance gain in Chip Multiprocessors (CMPs) architectures. As multicast communication is commonly used cache coherence protocols for CMPs various parallel applications, these systems can be significantly improved if operations are supported at hardware level. In this paper, we present several partitioning methods path-based approach mesh-based NoCs, each with different levels efficiency. addition,...

10.1109/tc.2012.255 article EN IEEE Transactions on Computers 2014-03-01

We present a self-contained adaptive system for detecting and bypassing permanent errors in on-chip interconnects. The proposed reroutes data on erroneous links to set of spare wires without interrupting the flow. To detect at runtime, novel in-line test (ILT) method using pattern generator is proposed. In addition, an improved syndrome storing-based detection (SSD) presented compared ILT method. Each (ILT SSD) integrated individually into noninterrupting system, case study performed compare...

10.1109/tvlsi.2009.2013711 article EN IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2009-11-03

Increasing the number of processors in a single chip toward network-based many-core systems requires run-time task allocation algorithm. We propose an efficient mapping algorithm that assigns communicating tasks incoming applications onto resources system utilizing Network-on-Chip paradigm. In our contiguous neighborhood (CoNA) algorithm, we target at reduction both internal and external congestion due to detrimental impact on network performance. approach goal by keeping mapped region...

10.1109/iccd.2012.6378665 article EN 2022 IEEE 40th International Conference on Computer Design (ICCD) 2012-09-01

Network congestion can limit performance of NoC due to increased transmission latency and power consumption. Congestion-aware adaptive routing greatly improve the network by balancing traffic load over network. In this paper, we present a reinforcement learning method, Q-learning, for alleviate in proposed local nonlocal information is propagated utilizing packets. This approach results better decisions up-to-date more reliable values. According information, path chosen packet which less...

10.1109/nesea.2011.6144949 article EN 2011-12-01

Two important aspects in dealing with autonomous navigation of a swarm drones are collision avoidance mechanism and formation control strategy; possible competition between these two modes operation may have negative implications for success efficiency the mission. This issue is exacerbated case distributed leader-follower based swarms since nodes concurrently decide act through individual observation neighbouring nodes' states actions. To dynamically handle this duality control, plan action...

10.1109/access.2020.3024953 article EN cc-by IEEE Access 2020-01-01

Three-dimensional IC technology offers greater device integration and shorter interlayer interconnects. In order to take advantage of these attributes, 3D stacked mesh architecture was proposed which is a hybrid between packet-switched network bus. Stacked feasible provides both performance area benefits, while suffering from inefficient intermediate buffers. this paper, an efficient optimize system performance, power consumption, reliability NoC proposed. The mechanism benefits...

10.1145/1999946.1999957 article EN 2011-05-01

Congestion occurs frequently in Networks-on-Chip when the packets demands exceed capacity of network resources. Congestion-aware routing algorithms can greatly improve performance by balancing traffic load adaptive routing. Commonly, these either rely on purely local congestion information or take into account conditions several nodes even though their statuses might be out-dated for source node, because dynamically changing conditions. In this paper, we propose a method to utilize both and...

10.5555/2492708.2492789 article EN Design, Automation, and Test in Europe 2012-03-12

The communication requirements of many-core embedded systems are convened by the emerging Network-on-Chip (NoC) paradigm. As on-chip reliability is a crucial factor in systems, NoC paradigm should address issues. Using fault-tolerant routing algorithms to reroute packets around faulty regions will increase packet latency and create congestion region. On other hand, performance highly affected network congestion. Congestion can delay route from source destination, so it be avoided. In this...

10.1109/aspdac.2013.6509555 article EN 2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC) 2013-01-01

Congestion occurs frequently in Networks-on-Chip when the packets demands exceed capacity of network resources. Congestion-aware routing algorithms can greatly improve performance by balancing traffic load adaptive routing. Commonly, these either rely on purely local congestion information or take into account conditions several nodes even though their statuses might be out-dated for source node, because dynamically changing conditions. In this paper, we propose a method to utilize both and...

10.1109/date.2012.6176488 article EN Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015 2012-03-01

While Networks-on-Chip have been increasing in popularity with industry and academia, it is threatened by the decreasing reliability of aggressively scaled transistors. This level failure has architectural ramifications, as may cause an entire on-chip network to fail. Traditional fault-tolerant routing algorithms can overcome faulty links or routers rerouting packets around regions. These approaches increase packet latency create congestion region. In this paper, we present a novel method...

10.1109/dsd.2012.82 article EN 2012-09-01
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