Memristor had been first theorized nearly 40 years ago by Prof. Chua, as the fourth fundamental circuit element beside three existing elements (Resistor, Capacitor and Inductor) but because no one has succeeded in building a memristor, it long remained theoretical element. Some months ago, Hewlett-Packard (hp) announced created memristor using TiO 2 /TiO 2-X structure. In this paper, characteristics, structures relations for invented hp's are briefly reviewed then two general SPICE models...

This paper proposes a novel graphene-based optical microelectromechanical systems MEMS accelerometer that is dependent on the intensity modulation and properties of graphene. The designed sensing system includes multilayer graphene finger, laser diode (LD) light source, photodiode, integrated waveguides. proposed provides several advantages, such as negligible cross-axis sensitivity, appropriate linearity behavior in operation range, relatively broad measurement significantly wider bandwidth...

This paper presents the design, fabrication, and characterization of a SU-8 four L-shaped beams optical micro-electro-mechanical-system accelerometer based on Fabry–Pérot (FP) interferometer. An applied acceleration causes displacement proof mass changes cavity FP resonator. Fabrication process has been simplified such that only two photolithography steps are required is used for both structural body sacrificial layer. To prevent layer from being exposed to UV light, thin copper coated by...

Device performance of armchair graphene nanoribbon field effect transistors in the presence surface roughness scattering is studied. A 2-D Gaussian autocorrelation function employed to model roughness. Tight-binding Hamiltonian and nonequilibrium Green's formalism are used perform atomic scale electronic transport simulation. The geometrical parameters on ON-current, OFF-current, transconductance, subthreshold swing investigated. Surface can strongly affect device depending how large...

A nanometer-sized graphene pressure sensor is schematically proposed. The membrane placed over a square cavity etched onto SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> substrate so that the transport along armchair direction of graphene. Two contacts are considered at two ends device. Current-pressure characteristic obtained for various sizes, bias voltages, and temperatures. device behavior investigated in terms sensitivity...

The performance of field effect transistors comprised a zigzag graphene nanoribbon that is symmetrically doped with boron nitride (BN) as channel material, numerically studied for the first time. device merit digital applications investigated in terms on-, off- and on/off-current ratio. Due to strong substrate roughness on devices, three common materials (SiO2, BN mica) are examined. Rough surfaces generated by means Gaussian auto-correlation function. Electronic transport simulations...

Recently, some photodetectors based on graphene have been proposed. In all of these works, current generation was carried out by separation photo-excited carriers using an electric field, either internal or external. this work, a new method producing which is different transmission coefficients for electrons and holes when they travel toward any the two contacts To end, single Stone–Wales defect close to one used break channel symmetry. order confirm idea, non-equilibrium Green's function...

In this letter, a general approach is proposed and conceptually designed for single-stage lattice type multi-stage photonic crystal Mach-Zehnder interferometer (PC-MZI) optical filters. Accordingly, new symmetric asymmetric PC-MZI structures based on hexagonal have been utilized demonstrated to manage wavelength specifications, such as central wavelength, passband width, bandwidth. The simulation results show that 1- 3-dB bandwidths can obtain about 29.6 51.2 nm the single-stage, 8.1 14...

Single electron devices, SEDs, are distinguished among all new nano-scale electronic devices due to their very small size, ultra-low power consumption, and consistent technology. This paper is dedicated digital application of single devices. The introduces a method for the speed enhancement bit error rate reduction based on parallelism concept tunneling paths wait time. Using this method, one can go beyond theoretical limitation these in any specified technology which comes from quantum...

This paper presents two new general threshold gate (GTG) structures which are based on the monostable‐bistable element (MOBILE) as their main part. These GTGs eliminate an RTD from structure compared to old and lead less elements count better performance in terms of power consumption, maximum frequency, power‐delay product (PDP). In also single three‐input XOR logic gates ones presented simulated HSPICE simulator.

Single electron devices (SEDs) are utilized in designing many logic gates; however, most cases the examination of circuits is limited to a DC analysis that only indicates correct performance circuits' function. This paper focuses mainly on issue optimization. In this regard, comparison different designs needed, but it not possible compare two unless they both belong single technology or can be scaled same technology. So, we first introduce index for SEDs, which allows meaningful comparisons...

Here, we report on the fabrication of an optoelectronic memcapacitor (memory capacitor) by manipulation ferroelectric properties through ferroelectric-semiconductor interface based a ZnO/PZT (Pb1.1(Zr0.52Ti0.48)O3) capacitor. A ZnO layer was deposited PZT chemical vapor deposition method to achieve memcapacitive effect. The capacitance-voltage and time-dependent capacitance characteristics Al/ZnO/PZT/Al were used as main outcome measurement. In asymmetric structure with layer, two stable...

This paper introduces the ensemble Monte Carlo (EMC) method to study time behavior of single-electron-based logic gates. The is then applied a buffer-inverter gate and results are examined. An analytical model for at low-temperature limit introduced its compared with those EMC. Finally, compact delay-error buffer introduced.

In this paper, the design of all two-input logic gates is presented by only a single-stage single electron box (SEB) for first time. All are constructed based on same circuit. We have used unique periodic characteristics SEB to these and present (monotonic/non-monotonic, symmetric/non-symmetric) design. conventional monotonic devices, such as MOSFETs, implementing non-monotonic XOR XNOR impossible design, multistage required which leads more complexity, higher power consumption less speed...

In the current research, for first time, Nano-scale finger gate vacuum channel field emission transistor (FGVFET) scaling down and its limitations considering electrical characteristics are studied. The FGVFET with different cathode electrode materials, dimensions, widths is considered impacts of these structural physical changes on key indicators device assessed to achieve a comprehensive design guideline. sensitivity analysis reveals that height modification by changing gate-anode oxide...