This paper proposes a high power-performance-area efficient background noise aware keyword-spotting (KWS) processor based on an optimized binarized weight network (BWN). To reduce the power consumption while maintaining system recognition accuracy for different noise, KWS with SNR prediction module can be adaptively configured to use dual computing modes (standard mode and approximate mode) both under ultra-low low noise. The mel-scale frequency cepstral coefficients (MFCC) is technologies,...

Abstract Robot manipulators perform a point-point task under kinematic and dynamic constraints. Due to multi-degree-of-freedom coupling characteristics, it is difficult find better desired trajectory. In this paper, multi-objective trajectory planning approach based on an improved elitist non-dominated sorting genetic algorithm (INSGA-II) proposed. Trajectory function planned with new composite polynomial that by combining of quintic polynomials cubic Bezier curves. Then, INSGA-II,...

This paper presents system-architecture-circuits co-designs for computing the MFCC feature extraction speech keywords recognition. The trade-off between accuracy and power consumption under various background noises is achieved by using 8-stage radix-2 single-path delay feedback FFT (R2SDF-FFT) precision self-adaptive architecture with approximate computing. R2SDF-FFT structure fine-grained bit-width quantization can reduce 35.7% of memory size. Approximate multiplication addition Dual-Vdd...

An ultra-low power always-on keyword spotting (KWS) accelerator is implemented in 22nm CMOS technology, which based on an optimized convolutional neural network (CNN). To reduce the consumption while maintaining system recognition accuracy, we first perform a bit-width quantization method proposed CNN to data/weight bit width required by hardware computing unit without reducing accuracy. Then, propose approximate architecture for quantized using voltage-domain analog switching multiplication...

This paper proposed an energy-efficient reconfigurable accelerator for keyword spotting (EERA-KWS) based on binary weight network (BWN) and fabricated in 28-nm CMOS technology. system consists of two parts: the feature extraction melscale frequency cepstral coefficients (MFCC) keywords classification a BWN model, which is trained through Google's Speech Commands database deployed our custom. To reduce power consumption while maintaining recognition accuracy, we first optimize MFCC...

Abstract Advanced mathematical tools are used to conduct research on the kinematics analysis of hybrid mechanisms, and generalized method concise transfer matrix obtained. In this study, first, according serial basic principles Lie groups algebras briefly explained in dealing with spatial switching differential operations screw vectors. Then, based standard ideas operations, for parallel mechanisms is derived, Jacobian Hessian formulated recursively a closed form. mapping relationship...

Abstract In order to study the vertical bearing characteristics of bored piles with different lengths in heterogeneous layered foundation, two single foundation were tested using BOFDA technique and anchor pile method static load test relying on testing project Lanzhou Zhongchuan International Airport Phase III expansion project. The top settlement, axial force, side friction resistance pile-soil relative displacement under measured analyzed. On other hand, limit lateral value was compared...

Based on a project in Lanzhou City, Gansu Province, China, the bearing and internal force characteristics of 2 piles different lengths under vertical load were tested analyzed by using BOFDA technology anchor pile method static test. The results show that long has higher capacity greater elastic working range, but axial short same trend. lateral friction resistance soil layer around plays role earlier than tip resistance, upper lower layer. increasing amplitude layers is also different....

This paper proposed a background-noise self-adaptive voice activity detection (VAD) accelerator using SNR prediction based precision dynamic reconfigurable approximate computing. To improve the energy efficiency while maintaining high recognition accuracy for different background noises, two optimization techniques are proposed. Firstly, we module to analyze and pre-classify back-ground noise into levels, binarized weight network (BWN) with data bit width implement feature classification of...

In this paper, an ultra-low power speech recognition processor is implemented based on optimized binarized weight neural-network (BWN). To accelerate the BWN and make it energy efficient, we proposed approximate computing architecture for quantized time-domain digital-analog mixed addition unit precision optimization with fault-tolerant training method. Experimental results show that can significantly reduce consumption while maintaining accuracy. Implemented under TSMC 28nm, support 10...

As the size of neural networks expands, computation and storage consumption recurrent is increasing. To solve this problem, paper proposes a network accelerator which can reduce redundancy, memory overhead energy consumption. A novel compression method based on pruning hybgrid quantization also proposed to overhead. Based designs above, precision adaptive approximate calculation designed achieve high efficiency. The experimental results show that under TSMC 28nm process, when data bit width...

Abstract The advanced mathematical tools are used to conduct research on the kinematics analysis of hybrid mechanisms, and generalized method concise transfer matrix obtained. First, according serial basic principles Lie groups algebras in dealing with spatial switching differential operations screw vectors briefly explained. Then, based standard ideas operations, for parallel mechanisms is derived, Jacobian Hessian formulated both recursively closed form. After that, mapping relationship...

A <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> N-SBR process solves the problems in conventional nitrogen and phosphorus removal systems, such as sludge age conflict competition for carbon source between bacteria bacteria. In order to save more energy achieve on-line control of process, ORP, DO, pH variations during anaerobic, aerobic, anoxic post aerobic stages were studied. The results showed that appearance flat indicated end...

A 286-299GHz dual-core push-push voltage-controlled oscillator (VCO) fabricated in 130-nm SiGe BiCMOS is presented this letter. compact and precise layout applied around the transistor, while LC-tank designed for optimal Q factor. To increase second harmonic output power of common-mode nodes, a enhancement technique adopted letter, which involves specific transmission lines capacitor Cr. The VCO delivers peak -1.2dBm, with DC-to-RF efficiency 0.66%, achieves phase noise -100dBc/Hz as well...

Abstract A front‐end MMIC working at 37–43.5 GHz for 5G high‐performance channel emulator is presented in this paper. The chip fabricated a 0.1‐μm commercial GaAs pHEMT process and integrated with passive star mixer local oscillator (LO) chain, which composed of frequency tripler, bandpass filter, power amplifier, an LO filter. 10.5 intermediate (IF) signal upconverted the high 48–54 through double‐balanced mixer, can output radiofrequency signal. avoid increase bit error rate caused by band...