A5057697329- Analog and Mixed-Signal Circuit Design
- Semiconductor materials and devices
- Advancements in Semiconductor Devices and Circuit Design
- Neuroscience and Neural Engineering
- Advancements in PLL and VCO Technologies
- Low-power high-performance VLSI design
- Cryptographic Implementations and Security
- Advanced DC-DC Converters
- Electrostatic Discharge in Electronics
- Wireless Power Transfer Systems
- Electromagnetic Compatibility and Noise Suppression
Sogang University
2022-2023
This letter proposes an ultralow power single-inductor multiple-output converter for implantable stimulation system. minimizes the number of switches turning <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> and xmlns:xlink="http://www.w3.org/1999/xlink">off</small> to deliver outputs 0.8, 1.8, 20 V, it uses a soft-switching technique all switching nodes. It also operates with self-oscillating controller only when require power. As...
This letter proposes an input-independent loop type-III buck converter (ILT3C) enhancing the security of edge devices. Compared to a conventional converter, ILT3C maximally improves power-supply rejection ratio as much 34.1 dB be robust against power injection attack. It also reduces peak electromagnetic interference 35.8 <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">μ</i> V enhance from side-channel Furthermore, external components such...
This paper proposes a low-dropout regulator (LDO) which is stable over an output capacitor (Co) range from 0 to 1 $\mu$F. The proposed LDO uses n-type power transistor ($\mathrm{M}_{\mathrm{P}}$) with high-gain single-stage error amplifier. Since, the designed as one-pole system and pole generated by large parasitic capacitance of MP impedance amplifier, this can easily be compensated without using any compensation capacitor, degrades slew rate (SR). To improve transient response maintain...
This article presents a capacitor-less low-dropout regulator (LDO) using bandwidth boosting technique, which is based on stable class B structure, and an improved buffer to achieve fast transient response. In measurement, this LDO supplies maximum load current of 300 mA at dropout voltage 200 mV achieves the best normalized figures merit 1.52 ns·mV. The proposed implemented in 0.5 <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">μ</i> m CMOS...
This paper presents a capacitive load driving buffer which has high slew-rate. To achieve higher slew-rate while consuming lower power, the proposed amplifier utilizes dual positive feedback loops dynamically increase current only when transient occurs. These two are designed to be correlated for The was in 0.18 μm CMOS process and it accomplished highest figure-of-merit (FOM) of 1195 among state-of-the-art amplifiers.