Bojie Ma

ORCID: 0009-0004-5612-2418
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About
Contact & Profiles
Research Areas
  • Advancements in Photolithography Techniques
  • Image Processing Techniques and Applications
  • VLSI and Analog Circuit Testing
  • Integrated Circuits and Semiconductor Failure Analysis
  • Face recognition and analysis
  • Digital Media Forensic Detection
  • Iterative Learning Control Systems
  • Advanced Image Processing Techniques
  • Generative Adversarial Networks and Image Synthesis
  • Nanofabrication and Lithography Techniques
  • Optical measurement and interference techniques
  • VLSI and FPGA Design Techniques
  • Industrial Vision Systems and Defect Detection
  • Image and Object Detection Techniques

University of Chinese Academy of Sciences
2021-2024

Institute of Microelectronics
2024

Chinese Academy of Sciences
2024

Institute of Microelectronics
2021

Shandong University of Science and Technology
2020

Image inpainting is to fill the content and pixels of missing area image so that it can achieve a semantic reasonable realistic visual effect. Recently deep neural network has shown its significant advantages in filling large areas tasks. These methods generate structures textures, but they usually produce distorted or fuzzy textures inconsistent with background. To solve these problems, we propose new progressive generation for inpainting. The proposed model does not only also effectively...

10.1109/icsip49896.2020.9339293 article EN 2021 IEEE 6th International Conference on Signal and Image Processing (ICSIP) 2020-10-23

Background: In datasets for hotspot detection in physical verification, data are predominantly composed of non-hotspot samples with only a small percentage ones; this leads to the class imbalance problem, which usually hinders performance classifiers. Aim: We aim enrich by applying augmentation technique. Approach: propose flow-based generative adversarial network (GAN) generate high-resolution samples. Results: evaluated our flow current state-of-the-art convolutional neural classifier...

10.1117/1.jmm.20.3.034201 article EN Journal of Micro/Nanopatterning Materials and Metrology 2021-07-15

With the VLSI technology shrinking to 7nm and beyond, Redundant Local Loop (RLL), also known as via pillar, becomes a promising candidate of redundant insertion due its compatibility with unidirectional layout style. Existing RLL approaches only leverage rule-based heuristics for manufacturing constraints, which can no longer obtain large enough Process Window (PW) in advanced nodes. It is imperative develop new techniques optimize lithography process window while inserting achieve good...

10.1117/12.2601685 article EN 2021-09-29
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