With the steady progress of digitization and information technology, application field phased array radar is expanding. At same time, with development wireless communication faced challenge accurately identifying multiple targets in complex electromagnetic environment. The multi-channel acquisition system core part radar. high performance has improved multi-target detection accuracy anti-interference ability fundamentally. hardware design includes four main parts: power supply circuit, cache...

Abstract The mass production of pigs will affect the ecological environment around pig farm. It requires hard work and a lot manpower material resources. This paper investigates status manure cleaning treatment, antibiotic nitrogen phosphorus treatment in manure, gas pollution farms. development house environmental monitoring farm feeding automation is reviewed. pointed out that research on disposal methods excretion pollutants, integration these methods, intelligence breeding become main...

Abstract Road cleaning vehicle is efficient equipment. It integrates road cleaning, garbage recycling and removing. This paper introduces the research background of vehicles briefly. Then it summarizes representative products vehicles, analyzes current status technology development. At present, multifunctional car on market has functions suction sweeping combination, no need to spray water, dust suppression, full filtration, purification emission. Some companies even integrate advanced...

As for the Siemens 840Dsl CNC system, this paper investigates time required manual programming and SHOPMILL automatic programming, as well machining efficiency of these two types based on cases study "slot workpiece" "bump milling . The experimental results show that same number workpiece", spent programme is about 4.1 times programme, using latter 4 former. In case almost both methods, but 2.5 programme.

For Fast Fourier Transform (FFT) processors, this paper presents a novel pseudo-exhaustive test strategy, in which adders FFT processor generate all the patterns. The scheme can detect combinational faults within every basic building cell of processors. Because reuse some blocks such as and registers existing processor, regularity circuit structure, be implemented at-speed parallel without performance degradation additional hardware overhead, with minimal area overhead..

This paper presents a model based method to estimate the internal core temperature of service power cable subject intermittent loading. The estimation is then used control loading so that can be safely utilized limit its capability. considers dependence resistance and insensitive variations in environment. backed by laboratory experiment effectiveness dynamic rating approach evaluated simulation.

For AC power smart sensor, the test method of characteristic parameters and performance is proposed based on correlation analysis. It compared analyzed with traditional approach to obtain according definition. pointed out that analysis can reduce impact interference in signal precision effectively, then system simplification, cost reduction improvement such as real-time are resulted little additional computing time. Experiments results show way, correlation-based number sample data for by...

Based on accumulator, a general testing approach for DSP data path and algorithms suitable the scheme to supply test patterns efficiently are proposed. For scheme, is classed into orders according structural similarity, then building modules with identical connections in one order partitioned layer. Finally, of performed under test-per-scan The results IIR filters paths based show that has high coverage multiple stuck-at faults can detect all single path. good generality be at-speed little...

In this paper, a kind of pseudo Gray code presentation test patterns based on accumulation generators is presented and low power scheme proposed to computational function modules with contiguous subspace in VLSI, especially DSP. If from accumulators for the are encoded presentation, switching activities reduced, decrease consumption resulted in. Results experimentation FPGA show that approach can reduce dynamic by an average 17.40% 8-bit ripple carry adder consisting 3-2 counters. Then...