- Parallel Computing and Optimization Techniques
- Embedded Systems Design Techniques
- Algorithms and Data Compression
- Distributed systems and fault tolerance
- Advanced Data Storage Technologies
- Advanced Memory and Neural Computing
- graph theory and CDMA systems
- Cloud Computing and Resource Management
- Interconnection Networks and Systems
- Teaching and Learning Programming
- Security and Verification in Computing
- Software Testing and Debugging Techniques
- Education and Digital Technologies
- Radiation Effects in Electronics
- Open Education and E-Learning
- Real-Time Systems Scheduling
Universidade Estadual de Campinas (UNICAMP)
1999-2023
Hospital de Clínicas da Unicamp
2020-2021
Pontifícia Universidade Católica de Campinas
1998-2003
This paper proposes a code compression technique called operand factorization. The central idea of factorization is the separation program expression trees into sequences tree-patterns (opcodes) and patterns (registers immediates). Using this technique, we show that tree have exponential frequency distributions. A set experiments were designed to explore feature. They reveal an average ratio 43% for SPECInt95 programs. decompression engine proposed, which assembles uncompressed instruction...
This paper proposes a code compression technique called operand factorization. The central idea of factorization is the separation program expression trees into sequences tree-patterns (opcodes) and patterns (registers immediates). Using this technique, we show that tree have exponential frequency distributions. A set experiments were designed to explore feature. They reveal an average ratio 43% for SPECInt95 programs. decompression engine proposed, which assembles uncompressed instruction...
Reducing program size has become an important goal in the design of modern embedded systems targeted to mass production. This problem driven efforts aimed at designing processors with shorter instruction formats (e.g., ARM Thumb and MIPS16) or able execute compressed code IBM PowerPC 405), paper proposes three compression algorithms for RISC architectures. In all algorithms, encoded symbols are extracted from expression trees. The differ on granularity symbol, which selected whole trees,...
RISC processors can be used to face the ever increasing demand for performance required by embedded systems. Nevertheless, this solution comes with cost of poor code density. Alternative encodings instruction sets, such as MIPS16 and Thumb, represent an effective approach deal drawback. This article proposes apply a new encoding SPARCv8 architecture. Through extensive analysis program mix from Mibench Mediabench benchmark suites, we suggest 16-bit set, easily translated its 32-bit...
Summary Non‐volatile memory (NVM) is an emerging technology being explored as alternative to DRAM main in computing systems because of its persistence, higher storage density, lower energy consumption, and access latency close DRAM. However, persistent must ensure data consistency on system failures, a property known crash consistency. One the challenges these creating efficient checkpointing mechanisms terms performance usability. Thus, it necessary remove persistence from critical...
Decreasing the program size has become an important goal in design of embedded systems targeted to mass production. This problem led a number efforts aimed at designing processors with shorter instruction formats (e.g. ARM Thumb and MIPS16), or that can execute compressed code IBM CodePack PowerPC). Much this work been directed towards RISC architectures though. paper proposes solution executing on DSPs. The experimental results reveal average compression ratio 75% for typical DSP programs...
Resumo: Um dos problemas encontrados nos cursos de Computacao e Informatica o aprendizado programacao nas disciplinas introdutorias. Com objetivo tentar resolver este problema, propoe-se um ambiente colaborativo para programacao, seguindo paradigma procedimental, que deve permitir envolvimento estudantes, professores sistemas inteligentes, oferecendo meios geracao discussao ideias, resolucao problemas, acesso localizacao informacao on-line util, motivacao a participacao estudantes. Abstract:
Decreasing the program size has become an important goal in design of embedded systems targeted to mass production. This problem led a number efforts aimed at designing processors with shorter instruction formats (e.g. ARM Thumb and MIPS16), or that can execute compressed code IBM CodePack PowerPC). Much this work been directed towards RISC architectures though. paper proposes solution executing on DSPs. The experimental results reveal average compression ratio 75% for typical DSP programs...
Os sistemas com memória não volátil (NVM) precisam ser consistentes à falhas. Dentre os principais desafios está criar mecanismos de checkpointing viáveis em termos desempenho e usabilidade, para isso é necessário reduzir o número escritas na NVM, pois aumento excessivo gera maior uso largura banda e, consequentemente, degrada desempenho. Neste trabalho proposto DONUTS, um mecanismo transparente ao software que épocas dinâmicas por meio checkpoints integrados política substituição cache....
NVM architectures must keep consistent data in case of failures, a property called crash consistency. A common way to do so is by checkpoint mechanisms. However, most the strategies developed have performance and usability problems. Among main limitations are non-software-transparent strategies, addition logging operations critical execution path, increased writes NVM, resulting significant bandwidth usage between processor memory. DONUTS solves these problems hardware mechanism that...
In the last decades, many advances have been made in clock frequencies and silicon integration. With increase energy consumption, energy-aware computing has become a topic of great interest to community. A wide variety works focus on software techniques reduce consumption when device's battery is running out. Even then, by not knowing how much available device 1) some routines can start do finish due an outage, 2) non-critical be called even out, 3) critical energy-intensive quickly drain...
Modern applications rely heavily on dynamically loaded shared libraries, making static analysis tools used to debug and understand no longer sufficient. As a consequence, dynamic are being adopted integrated into the development study of modern applications. Building that manipulate instrument binary code at runtime is difficult error-prone. Because that, Dynamic Binary Instrumentation (DBI) frameworks have become increasingly popular. Those provide means building with low effort. Among them,...
We propose a method for compressing programs running on embedded DSPs. Program expression trees are decomposed into opcode and operand sequences called patterns. show that DSP program patterns have exponential frequency distribution. Based that, we encode using mix of variable-length fixed-length codewords. A decompression engine is proposed, which converts uncompressed instruction sequences. The experimental results reveal an average compression ratio 67% typical TMS320C25 processor. This...