In this paper, we present the receiver and on-chip antenna sections of a fully integrated 77-GHz four-element phased-array transceiver with antennas in silicon. The section chip includes complete down-conversion path comprising low-noise amplifier (LNA), frequency synthesizer, phase rotators, combining amplifiers, dipole antennas. signal is performed using novel distributed active at an IF 26 GHz. LO path, output 52-GHz VCO routed to different elements can be shifted locally by rotators. A...

A fully-integrated 16-element 60-GHz phased-array receiver is implemented in IBM 0.12-μm SiGe BiCMOS technology. The employs RF-path phase-shifting and designed for multi-Gb/s non-line of sight links the ISM band (IEEE 802.15.3c 802.11ad). Each RF front-end includes variable-gain LNAs phase shifters with each capable 360° variable shift (11.25° resolution) from 57 GHz to 66 coarse/fine gain steps. detailed analysis noise trade-offs array design presented motivate architectural choices....

Integration of mm-wave multiple-antenna systems on silicon-based processes enables complex, low-cost for high-frequency communication and sensing applications. In this paper, the transmitter LO-path phase-shifting sections first fully integrated 77-GHz phased-array transceiver are presented. The SiGe utilizes a local architecture to achieve beam steering includes four transmit receive elements, along with LO frequency generation distribution circuitry. scheme robust network that scales well...

A phased-array transmitter (TX) for multi-Gb/s non-line-of-sight links in the four frequency channels of IEEE 802.15.3c standard (58.32 to 64.8 GHz) is fully integrated a 0.12-μm SiGe BiCMOS process. It consists an up-conversion core followed by 1:16 power distribution tree, 16 phase-shifting front-ends, and digital control unit. The TX two-step sliding-IF chain with synthesizer that features 40 dB gain programmability, I/Q balance LO leakage correction, modulator common-mode signaling....

Silicon offers a new set of possibilities and challenges for RF, microwave, millimeter-wave applications. While the high cutoff frequencies SiGe heterojunction bipolar transistors ever-shrinking feature sizes MOSFETs hold lot promise, design techniques need to be devised deal with realities these technologies, such as low breakdown voltages, lossy substrates, low-Q passives, long interconnect parasitics, high-frequency coupling issues. As an example complete system integration in silicon,...

A low-power 28-GHz phased-array receiver (RX) front end is presented that incorporates a low-noise amplifier (LNA) and passive reflection-type phase shifter (RTPS) capable of 360° shift with 5-b resolution low gain variation. Passive shifters are limited by tradeoffs between resolution, insertion loss, range. The proposed RTPS load design optimization approach leads to achieving the state-of-the-art loss range variation across shift. LNA adopts transformer-coupled neutralization architecture...

A low-cost, fully-integrated antenna-in-package solution for 60 GHz phased-array systems is demonstrated. Sixteen patch antennas are integrated into a 28 mm × ball grid array together with flip-chip attached transmitter or receiver IC. The packages have been implemented using low temperature co-fired ceramic technology. interconnects, including transitions and via structures, optimized full-wave simulation. Anechoic chamber measurement has shown ~ 5 dBi unit antenna gain across all four IEEE...

This paper discusses the design and implementation of a 94-GHz phased-array transceiver front-end in SiGe BiCMOS that is capable receiving concurrently both vertical (V) horizontal (H) polarizations time-duplexed transmission either polarization. The compact implemented 1.3 mm× 1.45 mm silicon area to ensure compatibility with scalable tile approach λ/2 ( ~ 1.6 mm) spacing between elements. Each includes variable transmitter (TX) receiver (RX) gain 360° phase shift TX RX. Co-integration...

This paper presents the first fully integrated 24-GHz phased-array transmitter designed using 0.18-/spl mu/m CMOS transistors. The four-element array includes four on-chip power amplifiers, with outputs matched to 50 /spl Omega/, that are each capable of generating up 14.5 dBm output at 24 GHz. heterodyne has a two-step quadrature up-conversion architecture local oscillator (LO) frequencies 4.8 and 19.2 GHz, which generated by an frequency synthesizer. Four-bit LO path phase shifting is...

A 24-GHz +14.5-dBm fully integrated power amplifier with on-chip 50-/spl Omega/ input and output matching is demonstrated in 0.18-/spl mu/m CMOS. The use of substrate-shielded coplanar waveguide structures for networks results low passive loss small die size. Simple circuit techniques based on stability criteria derived result an unconditionally stable amplifier. achieves a gain 7 dB maximum single-ended 3-dB bandwidth 3.1 GHz, while drawing 100 mA from 2.8-V supply. chip area 1.26 mm/sup 2/.

A multilayer organic package with embedded 60-GHz antennas and fully integrated a phased-array transmitter or receiver chip is demonstrated. The includes sixteen antennas, an open cavity for housing the flip-chip attached RF chip, interconnects operating at DC-66 GHz. 28 mm ball grid array manufactured using printed circuit board processes uses combination of liquid-crystal polymer glass-reinforced laminates, allowing excellent interconnect antenna performance. measured return loss gain each...

Integrated 60-GHz active and passive phase shifters for RF-path phase-shifting phased array transceivers are demonstrated in this paper. The reflection-type shifter achieves >180deg variation across the 57 GHz-64 GHz band with insertion loss varying from 4.2 dB-7.5 dB at 60 GHz. employs vector-interpolation architecture 360deg variation, -2 gain, 12 3 bandwidth 16.5 noise figure Measurements over process temperature also discussed comparisons drawn between shifting approach arrays.

This article discusses the benefits and challenges associated with design of multi-function scalable phased arrays at millimeter wave frequencies. First, applications for tens to hundreds elements are discussed. Existing solutions scaling silicon-based from microwave terahertz frequencies reviewed. The tradeoffs multiple integration options W-band analyzed, special consideration given packaging antenna performance. Finally, a solution based on SiGe ICs organic packages 64-element...

This paper reports a 6-to-18 GHz integrated phased- array receiver implemented in 130-nm CMOS. The is easily scalable to build very large-scale phased-array system. It concurrently forms four independent beams at two different frequencies from 6 18 GHz. nominal conversion gain of the ranges 16 24 dB over entire band while worst-case cross-band and cross-polarization rejections are achieved 48 63 dB, respectively. Phase shifting performed LO path by digital phase rotator with RMS error...

This paper describes a new approach to low-phasenoise LC VCO design based on transconductance linearization of the active devices. A prototype 25 GHz this is integrated in dual-path PLL and achieves superior performance compared state art. The implemented 32 nm SOI CMOS technology phase noise - 130 dBc/Hz at 10 MHz offset from 22 carrier. Additionally, introduces layout for switched capacitor arrays that enables wide tuning range 23%. More than 1500 measurements across PVT variations were...

This paper presents a multi-function, dual-polarization phased array transceiver supporting both radar and communication applications at W-band. 32 receive elements 16 transmit with dual outputs are integrated to support polarized antennas in package. The IC further includes two independent 16:1 combining networks, receiver downconversion chains, an up-conversion chain, 40GHz PLL, 80GHz frequency doubler, extensive digital control circuitry, on-chip IF/LO combining/distribution circuitry...

A fully-integrated antenna-in-package (AiP) solution for W-band scalable phased-array systems is demonstrated. We present a fully operational compact transceiver package with 64 dual-polarization antennas embedded in multilayer organic substrate. This has 12 metal layers, size of 16.2 mm × mm, and 292 ball-grid-array (BGA) pins 0.4 pitch. Four silicon-germanium (SiGe) ICs are flip-chip attached to the package. Extensive full-wave electromagnetic simulation radiation pattern measurements have...

The widespread use of WiFi in the 2.4-GHz ISM band creates potential for RF powering using radios. This paper presents design a cm-scale RF-energy harvester including antenna, rectifier, and dc-dc boost converter band. rectifier are designed while considering cold-start operation nanowatt-scale available power from incident <;-33 dBm. Low-power management unit leads to ~1-nW quiescent power. implementation 65-nm CMOS occupies 1.6 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML"...

Large-scale multiple-input-multiple-output(MIMO) technology is drawing significant interest for the next-generation wireless networks. Traditional MIMO receiver architectures use multiple parallel front ends with digitization at every element to support digital space-time array processing. The absence of analog/RF spatial interference mitigation in traditional arrays results a high dynamic-range requirement, and consequently, power-hungry analog RF analog-to-digital converters. This paper...

The demonstration of multi-Gb/s links in the 60GHz band has created new opportunities for wireless communications [1,2]. Due to directional nature millimeter-wave (mm-Wave) propagation, beam steering enables longer-range non-line-of-sight (NLOS) at these frequencies. A phased-array architecture is attractive an integrated transmitter (Tx) since it can attain both and higher EIRP through spatial combining. An all-RF 16-element 40-to-45GHz Tx satellite applications [3], a 6-element with...

This paper describes the general architecture and signal-path behavior of a CMOS programmable phased-array receiver element that simultaneously operates at two frequencies between 6 18GHz (a tritave) while forming four independently controlled beams.

Enterprise networks today host a wide variety of network services, which often depend on each other to provide and support network-based services applications. Understanding such dependencies is essential for maintaining the well-being an enterprise its applications, particularly in presence attacks failures. In typical network, complex dynamic configuration, it non-trivial identify all these their dependencies. Several techniques have been developed learn automatically. However, they are...

This article summarizes the development of mature and highly integrated SiGe BiCMOS ICs for gigabit-per-second communications according to requirements IEEE 802.15.3c 802.11.ad-draft standards. A single-element transceiver chipset point-to-point is described with emphasis on a feature-rich yet compact 60-GHz receiver. Next, 16-element phased-array non-line-of-sight described, new power-efficient transmitter. Examples line-of-sight link experiments are provided, system-level implementation...

A 2.4 GHz 365 nW wake-up receiver (WuRX) with RF envelope detection using rectifier-antenna co-design for passive voltage gain and filtering is presented. The frequency-tunable WuRX uses a programmable 32-bit OOK signature, achieving sensitivity of -61.5 dBm 2.5 kb/s without any off-chip matching components between IC antenna. in the high-Q interface results 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-3</sup> BER even...

Demonstrations of mm-Wave arrays with >50 elements in silicon has led to an interest large-scale MIMO for 5G networks, which promise substantial improvements network capacity [1,2]. Practical considerations result such being developed a tiled approach, where N unit cells M each are achieve large MIMO/phased NM [2]. Achieving stringent phase-noise specifications and scalable LO distribution maintain phase coherence across different cell ICs/PCBs critical challenge. In this paper, we...