Si modulators and Ge photodetectors are monolithically integrated on Si-on-insulator. The carrier-depletion-type achieved high modulation efficiency speed ( <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:xlink="http://www.w3.org/1999/xlink">¿</sub> xmlns:xlink="http://www.w3.org/1999/xlink">L</i> = 2.56 V·cm, 10 Gb/s). Low-voltage operation xmlns:xlink="http://www.w3.org/1999/xlink">RF</sub> 1...

A 60-GHz artificial magnetic conductor (AMC)-based circularly polarized (CP) on-chip antenna has been designed and fabricated using standard 0.18-μm six metal-layer CMOS technology. The design consists of a wideband loop at the top layer M6 novel AMC structure bottom M1. size including modified is 1.8 × 0.3 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> . circular open-loop employed for because gap within can excite traveling wave...

This paper discusses the design methodologies of a 340 GHz on-chip 3-D antenna. Firstly, high-gain and high-radiation efficiency substrate integrated waveguide (SIW) cavity backed antenna is designed using standard 0.13- μm SiGe BiCMOS technology. Then, low-permittivity supporter dielectric resonator (DR) are vertically stacked on proposed antenna, forming Yagi-like to further enhance gain radiation efficiency. The measurements showed that achieved peak ~10 dBi ~80% at GHz; impedance...

This work discusses the design methodologies of 130-GHz high gain and efficiency on-chip meander slot antennas in a standard CMOS technology. In proposed structure, stacked dielectric resonators (DRs) are placed on top feeding element to form series-fed antenna array for improvement. The integrated with double DRs achieved measured 4.7 dBi at 130 GHz bandwidth 11%. size is 0.8 ×0.9 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>...

This paper presents a terahertz (THz) transmitter (Tx) and receiver (Rx) chipset operating around 400 GHz in 0.13- μm SiGe BiCMOS technology. The Tx chip consists of voltage-controlled oscillator, buffer, modulator, power amplifier, frequency tripler, substrate integrated waveguide (SIW) antenna. antenna has an additional high-pass filtering characteristic to suppress the unwanted fundamental ( <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">f</i>...

This paper presents an automatic gain control (AGC) amplifier with temperature compensation for high-speed applications. The proposed AGC consists of a folded Gilbert variable (VGA), dc offset canceller, inductorless post amplifiers, linear open-loop peak detector (PD), integrator, symmetrical exponential voltage generator, and block stability. novel scheme ensures the stability accuracy over <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML"...

In this paper, on-chip higher-order-mode dielectric-resonator antennas (DRAs), fed by a half-mode-backed cavity structure using standard CMOS technology, are presented. With the dominant mode (half-TEz100), half-mode cavity-feeding provided high antenna radiation efficiency. The dielectric resonators (DRs) were designed to operate at higher-order modes (TEx¿13, TEx¿15) enhance gain. At around 135 GHz, proposed demonstrated measured gains of 6.2 dBi and 7.5 for TEx¿13 TEx¿15 modes,...

The through silicon via (TSV) technology provides a promising option to realize compact millimeter-wave (mmW) and terahertz (THz) system with high performance. As the fundamental elements in this system, transmission lines (T-lines) interconnects are very important therefore studied paper. A TSV-based substrate integrated waveguide (SIW) is also characterized. results show that, T-lines viable at frequencies lower than ~150 GHz whereas SIW can operate relatively well up 300 GHz. In addition,...

This paper proposes a new 60-GHz single-pole-double-throw (SPDT) switch. It is designed in 1.2-V 130-nm bulk CMOS and has small core area of 222 μm × 92 μm. The switch exhibits measured insertion loss 1.7 dB, isolation 22 input return 20 output 14 simulated power-handling capability 13.8 dBm at 60 GHz. proposed SPDT demonstrates such superior performances consumes much smaller die to those other switches, therefore potential be used highly integrated radios.

This paper presents the design of an X-band phased-array transceiver core chip in 0.13-μm SiGe BiCMOS technology. The system is based on all-RF architecture and contains switches, low-noise amplifier (LNA), power (PA), common leg 5-bit phase shifter with loss compensation amplifiers. A distributed structure used gain amplifiers to ease multi-stage roll-off transmit (TX)/receive (RX) paths. LNA utilized RX path achieve broadband amplification acceptable noise figure (NF) while a stacked PA TX...

A 340-GHz on-chip antenna (OCA) with highgain and high-radiation efficiency is designed using a standard 0.13-μm SiGe BiCMOS technology without any postprocesses. In the proposed OCA structure, rectangular slot loop etched in upper wall of substrate integrated waveguide (SIW) to form magnetic current radiator. The SIW structure forms back cavity suppress surface waves separate radiation aperture from low-resistivity substrate. Furthermore, side edge λ <sub...

This paper presents the detailed design and demonstration of a Ka-band single-chip transmit (TX)/receive (RX) front-end in 0.13- $\mu \text{m}$ SiGe BiCMOS technology. The includes single-pole double-throw (SPDT) switches, low-noise amplifier, loss compensation amplifiers (LCAs), phase shifter, power amplifier. Distributed structures are utilized gain to ensure broadband performance while stacked structure is adopted amplifier deliver high output TX mode. A 5-b shifter with strategies for...

The low-frequency noise (LFN) in the subthreshold region of both n- and p-type gate-all-around silicon nanowire transistors (SNWTs) is investigated. measured drain-current spectral density shows that LFN this regime can be well described by mobility-fluctuation model due to volume-inversion conduction behavior, Hooge parameter extracted. SNWTs with channels oriented lang010rang lang110rang directions compared. It observed mobility enhancement direction for leads a corresponding increase...

This letter describes a D-band 3-stage cascode amplifier developed using the IHP 0.13 μm SiGe BiCMOS technology. The is implemented with low-loss transformer for inter-stage matching and single-to-differential transformation. large-signal characteristics of HBT configuration are used to optimize bias condition highest output power gain performance. A measured achieves peak 24.3 dB, 3 dB bandwidth 20 GHz centered at 130 GHz. exhibits saturated 7.7 dBm an 1 compression point 6 consumption 84...

This paper presents a 320-GHz 1 ×4 fully integrated phased array transmitter using 0.13- μm SiGe BiCMOS technology. The is aiming for terahertz wireless communication and based on RF beam forming architecture. By integrating 20-GHz phase-locked-loop (PLL) frequency synthesizer, an 80-GHz quadrupler, 1:4 Wilkinson power divider network, four-way tunable attenuators, amplifiers, analog phase shifters, quadruplers/modulators, on-chip antenna arrays, the chip achieves maximal EIRP of 10.6 dBm at...

In this paper, three high-gain on-chip antennas are proposed using different silicon-based technologies in the millimeter-wave/THz frequency range. A modified Vivaldi antenna is first implemented micro-fabricated floating process. process, top metal layer supported by vias, separating it from silicon substrate for low-loss application. The gain of 5.5 dBi obtained with 78% radiation efficiency. monopole subsequently designed silicon-benzocyclobutene (Si-BCB) micro-machined backed cavity high...

A low conversion-loss monolithic frequency doubler has been developed for D-band signal generation in 0.13-μm SiGe BiCMOS technology. The circuit uses a single-transistor topology with novel grounded-shielding structure, which can efficiently reduce the parasitic feedback effect between collector and base of HBT to achieve multiplication. measurement results show that exhibits minimum ~3.2-dB conversion loss at output 134 GHz efficiency ~5.8% maximum -1.4-dBm second-harmonic power 132 ~7%,...

High-data-rate short-range communication and image systems beyond 100GHz impose crucial requirements on signal sources, demanding superior purity stability. Using frequency multipliers with high efficiency multiplication factor to generate the N <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sup> harmonic that is phase-locked by a PLL at fundamental provides an alternative solution. The desired in active multiplier can be generated using...

Scandium oxide (Sc₂O₃) exhibits significant potential in the field of high-performance solar-blind ultraviolet (SBUV) photodetectors due to its ultra-wide bandgap (5.2-6.3 eV), excellent thermal stability, and chemical stability. To precisely...

In modern CMOS technologies, metal dummy fills are required to maintain density uniformity and planarize the layers. As frequency increases, effect of on integrated circuits or components should be taken into account. This work presents experimental results microwave behavior spiral inductors fabricated in a standard 0.18-μm technology. The influences equivalent model parameters Q-factor characterized based measured S-parameters with without fills.

A physics-based equivalent-circuit model for on-chip symmetric transformers is presented with all the elements driven from fabrication specifications. Two extra coupled transformer loops are used each coil to parameters of skin effect, proximity and reflective effect substrate eddy current, respectively. Model accuracy under free space first demonstrated using an electromagnetic field solver without considering loss. Several sets were fabricated on a standard 0.18- mum 1P8M RF CMOS...

This paper presents a cavity-backed slot (CBS) antenna for millimeter-wave applications. The cavity of the is fully filled by polymer material. filling makes fabrication silicon CBS feasible, reduces size 76.8%, and also maintains inherent high-gain wide bandwidth. In addition, through-silicon via-based architecture proposed to integrate 135-GHz with active circuits complete system-in-package. Results show that structure not only footprint but suppresses electromagnetic interference.

A 27–41 GHz monolithic balanced frequency doubler fabricated using the 0.13 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\mu{\rm m}$</tex></formula> SiGe BiCMOS technology is presented in this letter. The consists of a balun, driver amplifier (DA), common-base (CB) doubling core and medium power amplifier. CB topology used to increase bandwidth for ease matching with balun. proposed attained...

This paper presents two endfire on-chip antennas (OCAs) at 140 and 320 GHz using a standard 0.13-μm SiGeBiCMOS technology; quasi-Yagi antenna concept is used with loaded dielectric. In order to eliminate the influence of low-resistivity silicon substrate, substrate thickness chosen as ~84 μm (for GHz), mounted on edge metal supporter front part ungrounded. The dielectric designed dioxide (SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML"...