Ping-Chen Huang

ORCID: 0000-0002-2021-6381
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About
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Research Areas
  • Radio Frequency Integrated Circuit Design
  • Advanced Memory and Neural Computing
  • Semiconductor materials and devices
  • Analog and Mixed-Signal Circuit Design
  • Ferroelectric and Negative Capacitance Devices
  • Advancements in PLL and VCO Technologies
  • Microwave Engineering and Waveguides
  • Neural dynamics and brain function
  • Advanced Chemical Sensor Technologies
  • Neural Networks and Reservoir Computing
  • Photonic and Optical Devices
  • Sensor Technology and Measurement Systems
  • Engineering Structural Analysis Methods
  • Molecular Communication and Nanonetworks
  • Electromagnetic Launch and Propulsion Technology
  • Advanced Power Amplifier Design
  • Speech and Audio Processing
  • CCD and CMOS Imaging Sensors
  • Speech Recognition and Synthesis
  • Neural Networks and Applications
  • Insect Pheromone Research and Control
  • Advanced Photonic Communication Systems
  • Transportation Safety and Impact Analysis
  • Neuroscience and Neural Engineering
  • Electrostatic Discharge in Electronics

Qualcomm (United States)
2017-2018

National Taiwan University
2005-2016

University of California, Berkeley
2011

We demonstrate an end-to-end brain-inspired hyperdimensional (HD) computing nanosystem, effective for cognitive tasks such as language recognition, using heterogeneous integration of multiple emerging nanotechnologies. It uses monolithic 3D carbon nanotube field-effect transistors (CNFETs, logic technology with significant energy-delay product (EDP) benefit vs. silicon CMOS [1]) and Resistive RAM (RRAM, memory that promises dense non-volatile analog storage [2]). Due to their low fabrication...

10.1109/isscc.2018.8310399 article EN 2022 IEEE International Solid- State Circuits Conference (ISSCC) 2018-02-01

The field of machine learning is witnessing rapid advances along several fronts: new models, algorithms utilizing these hardware architectures for algorithms, and technologies creating energy-efficient implementations such architectures. Hyperdimensional (HD) computing represents one model. Emerging nanotechnologies, as carbon nanotube field-effect transistors (CNFETs), resistive random-access memory (RRAM), their monolithic 3D integration, enable energyand area-efficient HD Such efficient...

10.1109/jssc.2018.2870560 article EN publisher-specific-oa IEEE Journal of Solid-State Circuits 2018-10-03

An LC source-degeneration negative-resistance cell of an VCO is investigated, which capable operating at millimeter-wave (MMW) range with low dc power consumption.Several cells in oscillators are also compared.The source-degenerated topology demonstrated through a 114-GHz push-push fully integrated implemented TSMC 0.13-m CMOS process.With core consumption 8.4 mW, the tuning fundamental port 56.4-57.6GHz and 112.8-115.2GHz.The measured phase noise 113.6 dBc/Hz 10-MHz offset.This believed to...

10.1109/jssc.2007.897136 article EN IEEE Journal of Solid-State Circuits 2007-06-01

A 131 GHz cross-coupled push-push voltage controlled oscillator (VCO) is realized in 90-nm CMOS technology. It can be tuned from 129.8 to 132 GHz, with an estimated phase noise of -108.4 dBc/Hz at 10 MHz offset. The provides a output power -15.2 dBm and fundamental +0.33 dBm, under core current 20 mA 1-V supply voltage. Maximum powers are -11.4 +2.1 respectively. To the authors' knowledge, this highest frequency VCO ever reported.

10.1109/rfic.2005.1489888 article EN 2005-01-01

A differential transimpedance amplifier combined with a positive feedback compensation circuit tolerates 1.5pF parasitic capacitance from ESD protection in 0.35 /spl mu/m SiGe BiCMOS. 2.5Gb/s receiver demonstrates 15k/spl Omega/ gain and DR -3 to -23.5dBm while consuming 21mW 3V supply.

10.1109/isscc.2005.1494040 article EN 2005-08-30

We investigate the task of retrieving information from compositional distributed representations formed by hyperdimensional computing/vector symbolic architectures and present novel techniques that achieve new rate bounds. First, we provide an overview decoding can be used to approach retrieval task. The are categorized into four groups. then evaluate considered in several settings involve, for example, inclusion external noise storage elements with reduced precision. In particular, find...

10.1162/neco_a_01590 article EN Neural Computation 2023-05-15

With the Internet of Things (IoT) paradigm promising to deploy trillions sensors, search is on for effective means efficiently derive useful information from flood sensor data through efficient hardware preprocessing. Of particular interest are computational paradigms that get their inspiration biological sensory systems seamlessly extract relevant highly analog signal processing. Functions, such as feature extraction, learning, or recognition, could especially benefit bio-inspired...

10.1109/tcsi.2017.2697945 article EN IEEE Transactions on Circuits and Systems I Regular Papers 2017-06-05

This paper presents a compact 35-65 GHz Gilbert cell up-convert mixer implemented in TSMC 0.18-/spl mu/m SiGe BiCMOS technology. Integrated broadband transformers and meandered thin-film microstrip lines were utilized to achieve miniature chip area of 0.6 mm /spl times/ 0.45 mm. The MMIC has flat measured conversion loss 7 plusmn/ 1.5 dB LO suppression more than 40 at the RF port from 35 65 GHz. power consumption is 14 mW 4-V supply. fully integrated millimeter-wave active that smallest ever...

10.1109/rfic.2006.1651129 article EN 2006-01-01

Usually the tuning range of voltage controlled oscillator (VCO) is much narrower than possible resonant frequency tank at different voltages. In this letter we analyze traditional common-base type VCO, give a simple but useful insight about mechanism behind topology, and verified conclusions with 2 mum heterojunction bipolar transistor (HBT) VCO. The results show that CB configuration, proper feedback inductor wide varactor, can be almost same as A wideband using commercial HBT technology...

10.1109/lmwc.2009.2029747 article EN IEEE Microwave and Wireless Components Letters 2009-09-11

This paper presents the development of 77- and 94-GHz monolithic fundamental mode VCOs using InP-based HBT MMIC technology. The performance was improved by base mesa undercutting ohmic along two sides to reduce base-collector junction capacitor 40% which results in f/sub T/ max/ 70 170 GHz, respectively. By this device, 77-GHz VCO exhibits a measured oscillation frequency 77.6 GHz with peak output power -3 dBm, while demonstrates 94.7 -3.5 dBm. is highest oscillator ever reported bipolar device

10.1109/rfic.1997.598749 article EN 2002-11-22

A 5.3 GHz high-efficiency and low-cost class-E power amplifier (PA) implemented in a 180 nm CMOS process is presented. Cascode configuration utilised the PA to achieve high efficiency due its gain property low drain-to-source parasitic capacitor. Through trade-off between inductance inductor loss, an optimised RF choke for fully integrated design can be selected while maintaining compact circuit size. The demonstrates highest Power Added Efficiency (PAE) of 42% greatest area density 532...

10.1049/el.2016.1629 article EN Electronics Letters 2016-06-21

The emergence of post-silicon nano-devices and the coming trillion-sensor era driven by Internet Things have led to a search for alternative computational paradigms that can efficiently derive useful information from abundant data while enable efficient hardware implementations under significant device variations. Such may emerge as we explore processing in biological sensory systems, which achieve unparalleled performance energy efficiency with mediocre unreliable components. This paper...

10.1109/jetcas.2018.2842035 article EN IEEE Journal on Emerging and Selected Topics in Circuits and Systems 2018-05-30

This brief presents a novel low-power analog Euclidian vector normalizer for signal processing in forms, such as the preprocessing of sensor array signals. Instead using multiple stages translinear circuits to synthesize norm with square root, squared sum, and division functions, this circuit performs concurrent normalization on input signals feedback control loop achieve compact area low power consumption. A simple two-step calibration is also provided overcome device mismatches. 6-channel...

10.1109/tcsii.2018.2823716 article EN IEEE Transactions on Circuits & Systems II Express Briefs 2018-04-06

We introduce a method to identify speakers by computing with high-dimensional random vectors. Its strengths are simplicity and speed. With only 1.02k active parameters 128-minute pass through the training data we achieve Top-1 Top-5 scores of 31% 52% on VoxCeleb1 dataset 1,251 speakers. This is in contrast CNN models requiring several million orders magnitude higher computational complexity for 2$\times$ gain discriminative power as measured mutual information. An additional 92 seconds...

10.48550/arxiv.2208.13285 preprint EN cc-by arXiv (Cornell University) 2022-01-01

Signal processing tasks such as classification or recognition may benefit from implementation strategies inspired by biological sensory pathways. In this paper, we employ an information-theoretic framework to explore the possible energy savings that can result approach when applied a specific problem, artificial olfactory system. A preliminary evaluation of efficiency versus SNR trade-offs for different signal representations demonstrates advantage one continuous-time discrete-valued (CTDV)...

10.1109/sips.2011.6088943 article EN 2011-10-01
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