- Embedded Systems Design Techniques
- Parallel Computing and Optimization Techniques
- Interconnection Networks and Systems
- Business, Innovation, and Economy
- Fuzzy Logic and Control Systems
- Mathematical Control Systems and Analysis
- Industrial Automation and Control Systems
- Evolutionary Algorithms and Applications
- Acoustic Wave Resonator Technologies
- Rough Sets and Fuzzy Logic
- Advanced Memory and Neural Computing
- Ferroelectric and Negative Capacitance Devices
- Sensor Technology and Measurement Systems
- Distributed and Parallel Computing Systems
- Embedded Systems and FPGA Applications
- Bayesian Modeling and Causal Inference
- Advanced Data Processing Techniques
- Knowledge Societies in the 21st Century
- Metaheuristic Optimization Algorithms Research
- VLSI and Analog Circuit Testing
- Analog and Mixed-Signal Circuit Design
- VLSI and FPGA Design Techniques
- Neural Networks and Applications
- Technology in Education and Healthcare
- Advanced Electrical Measurement Techniques
Instituto Politécnico Nacional
2014-2024
Tecnológico Nacional de México
2011-2019
Determination of markers systemic inflammation is one the important directions in study pathogenesis and improvement diagnosis chronic obstructive pulmonary disease (COPD), asthma-COPD overlap (ACO), bronchial asthma (BA). The aim our work was a comparative features changes serum levels IL-17, IL-18, TNF- α patients with COPD, ACO, BA various severity disease, as well evaluation relationship between level these cytokines lung ventilation function. A total 147 COPD (<mml:math...
The paper presents the results of implementation differential evolution algorithm on FPGA using floating point representation with double precision useful in real numeric problems.Verilog Hardware Description Language (HDL) was used for Altera hardware design.Schematics modules are presented.The performance design is evaluated through six different functions problems implemented hardware.
For many natural language processing applications, estimating similarity and relatedness between words are key tasks that serve as the basis for classification generalization. Currently, vector semantic models (VSM) have become a fundamental modeling tool. VSMs represent points in high-dimensional space follow distributional hypothesis of meaning, which assumes is related to context. In this paper, we propose model whose representations based on features associated with concept within...
A power efficient implementation of a CMOS Class-AB analog median filter is presented. The detector based on transconductance comparators accomplished with new Differential Flipped Voltage Followers. followers employ current comparator to switch-on an auxiliary transistor drive additional whenever it required, performing operation. Area saved by taking advantage the large impedance node accomplish Miller frequency compensation. Simulation results using ON-SEMI 0.5μm technology parameters...
The paper presents the results of FPGA implementation fuzzy Mamdani system with parametric conjunctions generated by monotone sum basic t-norms.The is implemented on DE2 Altera development board using VHDL language.The contains reconfigurable model membership functions and operations that gives possibility to adjust specific application.
In this article, a new CMOS voltage follower, with class AB output, derived by merging the super follower and flipped is introduced. The resulting cell exhibits lower output impedance than its predecessors. Expressions for behavior of proposed are verified circuit simulations in Eldo using C5N process models available through MOSIS Service. conducted analysis shows an improved performance presented respect to flipped- followers. To prove principle, test was fabricated mentioned technology...
Hyperdimensional Computing is an emergent model of computation where all objects are represented in high-dimensional vectors.This includes a well-defined set arithmetic operations that produce new highdimensional vectors, which, addition to represent basic entities, can also more complex data structures such as sets, relations and sequences.This paper presents method for sequence prediction using the Sparse Distributed Memory model.The proposed based on encoding, storage retrieval which...
The use of several different sources to feed a load jointly is convenient in many applications, particular those where two or more renewable energy are employed. These applications include harvesting, hybrid vehicles, and off-grid systems. A multi-input converter able admit characteristics select the output power each source necessary such applications. Several topologies converters have been proposed this aim; however, most them controlled by simple strategies based on small signal model...
ABSTRACT The development of SAW transducers requires a series steps ranging from material selection and geometry design to the fabrication techniques for their characterization validation process. Here, we use finite element method (FEM) present methodology detailed analysis in delay line configuration. First, simulate single‐finger double‐finger configurations with different geometries designs IDTs on two piezoelectric substrates, LiNbO 64 YX 128 orientation, compare simulation results...
In this paper, it is revealed that random exploration and attraction of the best (REAB) are two underlying procedures in many swarm intelligence algorithms. This particularly shown most known algorithms: particle optimization (PSO) gray wolf optimizer (GWO) From observation, here proposed instead building algorithms based on a narrative derived from observing some animal behavior, more convenient to focus perform REAB procedures; is, build make wide efficient explorations search space then...
Contemporary Vector Processors (VPs) are de-signed either for short vector lengths, e.g., Fujitsu A64FX with 512-bit ARM SVE support, or long vectors, NEC Aurora Tsubasa 16Kbits Maximum Length (MVL<sup>1</sup>). Unfortunately, both approaches have drawbacks. On the one hand, length VP designs struggle to provide high efficiency applications featuring vectors Data Level Parallelism (DLP). other waste resources and underutilize Register File (VRF) when executing low DLP lengths. Therefore,...
Modern reorder buffers (ROBs) were conceived to improve processor performance by allowing instruction execution out of the original program order and run ahead sequential code exploiting existing level parallelism (ILP). The ROB is a functional structure engine that supports speculative execution, physical register recycling, precise exception recovering. Traditionally, considered as monolithic circular buffer with incoming instructions at tail pointer after decoding stage completing head...
Translating a control law to code so that it can be executed in real time by microcontroller is time-consuming and requires knowledge diverse areas.There are powerful tools like Matlab DSpace, ease the process, however, these expensive hide way translation actually made.These two factors greatly diminish use of education small business.This paper presents SystDynam, high-level language designed for describing static dynamical systems hence, controllers.The was purposely created easy process...