- Particle physics theoretical and experimental studies
- High-Energy Particle Collisions Research
- Particle Detector Development and Performance
- Quantum Chromodynamics and Particle Interactions
- Dark Matter and Cosmic Phenomena
- Computational Physics and Python Applications
- Neutrino Physics Research
- Cosmology and Gravitation Theories
- Analog and Mixed-Signal Circuit Design
- Magnetic confinement fusion research
- Distributed and Parallel Computing Systems
- Radiation Detection and Scintillator Technologies
- Medical Imaging Techniques and Applications
- Superconducting Materials and Applications
- Fusion materials and technologies
- Advancements in Semiconductor Devices and Circuit Design
- VLSI and Analog Circuit Testing
- Advancements in PLL and VCO Technologies
- Advanced Data Storage Technologies
- CCD and CMOS Imaging Sensors
- Mass Spectrometry Techniques and Applications
- Atomic and Subatomic Physics Research
- Astrophysics and Cosmic Phenomena
- Integrated Circuits and Semiconductor Failure Analysis
- Nuclear reactor physics and engineering
LIP - Laboratory of Instrumentation and Experimental Particle Physics
2020-2025
University of Lisbon
2010-2025
Istanbul University
2023-2024
Institute for High Energy Physics
2023-2024
Institute of Science and Technology
2023-2024
A. Alikhanyan National Laboratory
2024
Culham Science Centre
2017-2024
SR Research (Canada)
2024
Federación Española de Enfermedades Raras
2024
United Kingdom Atomic Energy Authority
2022-2024
Measurements are reported of the fraction an ion beam in various charge states (-1, 0, +1, +2) after equilibrium has been established between competing electron capture and loss reactions. The ions ${\mathrm{H}}^{+}$,${\mathrm{He}}^{+}$, ${\mathrm{N}}^{+}$, ${\mathrm{Ne}}^{+}$, ${\mathrm{A}}^{+}$ were passed through gases hydrogen, helium, nitrogen, oxygen, air, neon, argon. energy range studied was 20 kev to 250 kev. Under conditions singly ionized neutral states, velocity dependence ratios...
A two-stage fully differential CMOS amplifier comprising inverters as input structures and employing self-biasing techniques is presented. The proposed benefits from an optimum compensation through time-domain optimization which permits achieving high energy efficiency. Moreover, it achieves the highest efficiency of its class although relies on a quasi-class-A topology, comparable to class-AB amplifiers. Detailed circuit analyses such differential-mode, common-mode feedback, noise, slew...
An Allen type electron multiplier has been studied to determine its feasibility as a quantitative detector of positive ions. Results are presented showing the gain or efficiency function aging, pressure, dynode voltage, and input current. Also, is for several ions (H+, H2+, He+, N+, Ne+, N2+, A+) in energy range from 5 250 kev.
The extrapolated ionization range for the ions ${\mathrm{He}}^{+}$, ${\mathrm{N}}^{+}$, ${\mathrm{Ne}}^{+}$, and ${\mathrm{A}}^{+}$ in stopping gases He, ${\mathrm{N}}_{2}$, air, A has been determined as a function of energy from $\mathrm{ca}$ 20 kev to 250 kev, using monoenergetic heavy produced Cockcroft-Walton accelerator. collimated beam is admitted chamber via three-stage differential pumping system so avoid use foil windows. was parallel plate mounted permit translation axis beam. It...
This paper describes a novel two-stage fully-differential CMOS amplifier comprising two self-biased inverter stages, with optimum compensation and high efficiency. Although it relies on class A topology, is shown through simulations, that achieves the highest efficiency of its comparable to best AB amplifiers. Due self-biasing, low variability in DC gain over process, temperature, supply achieved. detailed circuit analysis, design methodology for optimization most relevant simulation results...
This paper describes a digital built-in-self-test (BIST) solution to ADC dynamic performance testing. The proposed BIST system is based in uniform histogram approach test the linearity of ADCs. A pipeline with resolution 10 bits, DAC same as under and scheme were modeled simulated MATLAB prove its validity. Several 32 bits pseudorandom noise generators evaluated. When compared Gaussian approach, obtained results show that error on maximum INL 0.13 LSB for Mersenne twister generator an...
A CMOS analogue circuit for Gaussian noise generation as well a novel transforming into uniform noise, both designed operating with supply voltage of 1.5V, are presented. Both circuits optimized 0.35 /spl mu/m standard technology using an equation-based design methodology based on genetic algorithms. Electrical simulations demonstrate that high amplitudes together reasonable bandwidths can be achieved relatively low power dissipation. Potential applications include self-calibration and...
This paper describes a new digital-domain self- calibration technique for high-speed pipeline A/D converters using the internal thermal noise as input stimulus. low- amplitude is amplified and recycled by ADC itself and, due to successive foldings, it naturally converted into uniform noise. then used calculate required calibrating-codes. As an example, of 13-bit shows that overall linearity can be significantly improved this technique.
This paper presents a digital pseudorandom uniform noise generator (UNG) for built-in self-test (BIST) solution to ADC static performance test. A 32 bits Mersenne-Twister [1] was implemented in FPGA and evaluated prove its validity proposed BIST [2]. pipeline DAC, both with resolution of 10 the were modeled simulated MATLAB. The obtained results compared test error on maximum INL is 0.19 LSB, when UNG used. Furthermore, show that an adequate statistical significance this can be done just 1/4...
This paper presents the evaluation of two different digital pseudorandom uniform noise generators (UNGs) applied to ADC histogram test. Two 32 bits generators, a Mersenne-Twister (MTW) and Linear Feedback Shift Register (LFSR), were implemented on FPGA evaluated prove its validity in proposed built-in self-test (BIST) [1,2]. The BIST solution is based method obtained results compared with standard static test using Gaussian as stimulus. A pipeline DAC, both resolution 10 bits, generator...
This paper presents a new method to perform built-in-self-test (BIST) measure the DNL, INL and output noise of an ADC. The technique uses Gaussian source as input stimulus simple algorithm based in precalculated tables (on-chip ROMs) for DNL tests. results proposed BIST are compared with other standard simplicity digital circuitry together advantages pointed-out, clearly demonstrate attractiveness technique.
The high voltage system of TileCal, the ATLAS central hadron calorimeter, needs to be upgraded for HL-LHC, in so called Phase II Upgrade. In proposed solution upgrade, instead current location inside detector, HV regulation boards are deployed far from radiation, a room where there is permanent access maintenance. This option requires large number 100 m long cables but removes requirement radiation hard boards. HVremote have been developed and tested. Preliminary results presented.
A digital-domain self-calibration technique for video-rate pipeline A/D converters based on a white Gaussian noise input signal is presented. The implementation of the proposed algorithm requires simple digital circuitry. An application design example 12b, 40 MS/s CMOS ADC shown to illustrate that overall linearity can be highly improved using this technique.
Abstract The high voltage system of TileCal, the ATLAS central hadron calorimeter, is being upgraded for high-luminosity LHC, in so called phase II upgrade. In new configuration upgrade, regulation boards are not located inside detector anymore, they deployed far from radiation caused by collisions, a room where there permanent access maintenance. This option requires large number 100 m long cables but removes requirement hardened boards. HVremote and respective supplies have been developed...