A5069455997- CCD and CMOS Imaging Sensors
- Infrared Target Detection Methodologies
- Image Processing Techniques and Applications
- Neuroscience and Neural Engineering
Sony (Taiwan)
2017
This paper presents a 4.1 megapixel, 280 frames/s, back-illuminated, stacked, global shutter (GS) CMOS image sensor with array-parallel analog-to-digital converter (ADC) architecture for region-control applications. The solves an distortion problem caused by rolling in pixel sub-array utilizing floating diffusion (FD) memory to implement GS operation. A newly developed circuit technique, the combination of active reset and frame correlated double sampling (CDS) operation, cancels Vth...
A 4.1Mpix 280fps stacked CMOS image sensor with array-parallel ADC architecture is developed for region control applications. The combination of an active reset scheme and frame correlated double sampling (CDS) operation cancels Vth variation pixel amplifier transistors kTC noise. utilizes a floating diffusion (FD) based back-illuminated (BI) global shutter (GS) 4.2e-rms readout An intelligent system face detection high resolution region-of-interest (ROI) output demonstrated significantly...