A5075204665- Real-Time Systems Scheduling
- Parallel Computing and Optimization Techniques
- Embedded Systems Design Techniques
- Interconnection Networks and Systems
- Distributed and Parallel Computing Systems
- Network Time Synchronization Technologies
- Smart Grid Security and Resilience
- Distributed systems and fault tolerance
- IoT Networks and Protocols
- Real-time simulation and control systems
- Advanced Malware Detection Techniques
- Software-Defined Networks and 5G
- Software System Performance and Reliability
- Network Security and Intrusion Detection
- Context-Aware Activity Recognition Systems
- Advanced Software Engineering Methodologies
- Smart Grid Energy Management
- VLSI and FPGA Design Techniques
- Advanced Data Storage Technologies
- Advanced Wireless Communication Technologies
- Supercapacitor Materials and Fabrication
- Telecommunications and Broadcasting Technologies
- Energy Harvesting in Wireless Networks
- Advanced Computing and Algorithms
- Advanced Neural Network Applications
TU Dortmund University
2020-2025
Technische Universität Braunschweig
2014-2024
Hamburg University of Technology
2016-2019
Universität Hamburg
2018-2019
STMicroelectronics (France)
2012-2013
Verimag
2012-2013
Centre National de la Recherche Scientifique
2012-2013
Université Grenoble Alpes
2012-2013
Laboratoire des Technologies de la Microélectronique
2012
STMicroelectronics (Switzerland)
2011
Abstract The recently introduced 5G New Radio is the first wireless standard natively designed to support critical and massive machine type communications (MTC). However, it already becoming evident that some of more demanding requirements for MTC cannot be fully supported by networks. Alongside, emerging use cases applications towards 2030 will give rise new stringent on connectivity in general particular. Next generation networks, namely 6G, should therefore an agile efficient convergent...
Mixed critical platforms are those in which applications that have different criticalities, i.e. levels of importance for system safety, coexist and share resources. Such require a memory controller capable providing sufficient timing independence applications. Existing real-time controllers, however, either do not support mixed criticality or still allow certain degree interference between The former issue leads to overly constrained, hence more expensive, systems. latter forces designers...
In real-time and safety-critical systems, the move towards multicores is becoming unavoidable in order to keep pace with increasing required processing power meet high integration trend while maintaining a reasonable consumption. However, standard multicore systems are mainly designed increase average performance, whereas embedded have additional requirements respect safety, reliability realtime behavior. Therefore, shift raises several challenges community has face. These involve design of...
Automotive systems are currently undergoing a radical shift in the way they designed, implemented and deployed. Such changes impose an increased complexity high number of requirements order to be more automated, connected, dependable cost-effective. This raises several challenges that embedded community has face, encountered at different stages development from modeling design software/hardware deployment validation. paper discusses current industrial trends open problems hardware software...
In real-time and safety-critical systems, the move towards mul-ticores is becoming unavoidable in order to keep pace with increasing required processing power meet high integration trend while maintaining a reasonable consumption. However, standard multicore systems are mainly designed increase average performance, whereas embedded have additional requirements respect safety, reliability realtime behavior. Therefore, shift multicores raises several challenges community has face. These...
In this paper we investigate a general approach to automate some deployment decisions for certain class of applications on multi-core computers. We consider data-parallelizable programs that use the well-known double buffering technique bring data from off-chip slow memory local cores via DMA (direct access) mechanism. Based computation time and size elementary items as well characteristics, derive optimal near values number blocks should be clustered in single command. then extend results...
Finding tradeoffs in design space is naturally formulated as a multicriteria optimization problem. In this paper, we model between communication cost and the balance of processor workloads for problem mapping applications to processors multicore environment. We formulate several query strategies finding Pareto optimal approximately solutions using constraint solver time-bounded oracle. Each directs oracle through search different manner. evaluate efficiency these on series synthetic...
Due to the trends of centralizing EIE architecture and new computing-intensive applications, high-performance hardware platforms are currently finding their way into automotive systems. However, Systems-on-Chip (SoCs) available on market have significant weaknesses when it comes providing predictable performance for time-critical applications. The main reason this is that these optimized average-case performance. This shortcoming represents one major risk in development current future In...
Automotive systems are currently undergoing a radical shift in the way they designed, implemented and deployed. Such changes impose an increased complexity high number of requirements order to be more automated, connected, dependable cost-effective. This raises several challenges that embedded community has face, encountered at different stages development from modeling design software/hardware deployment validation. paper discusses current industrial trends open problems hardware software...
Ensuring security in real-time and safety-critical systems is becoming extremely challenging, particular due to the increasingly connectivity of these systems, such as emerging autonomous vehicles that are subject new higher number attacks. The main characteristics they have strict timing constraints. These constraints must be met order ensure correctness system. In this paper, we use temporal properties derived from analysis system required for safety, detect misbehavior improve its...
Mission critical applications in domains such as Industry 4.0, autonomous vehicles or Smart Grids are increasingly dependent on flexible, yet highly reliable communication systems. In this context, Fifth Generation of mobile Communication Networks (5G) promises to support mixed-criticality a single unified physical network. This is achieved by novel approach known network slicing, that fulfil diverging requirements while providing strict separation between tenants. We focus work hard...
Reducing the effects of off-chip memory access latency is a key factor in exploiting efficiently embedded multicore platforms. We consider architectures that admit multi-core computation fabric, having its own fast and small to which data blocks be processed are fetched from external using DMA (direct access) engine, employing double- or multiple-buffering scheme avoid processor idling. In this paper we focus on application programs process two dimensional arrays determine automatically size...
Time-division multiplexing (TDM) is the commonly used and well established solution to problem of sharing resources in real-time Networks-on-Chip (NoCs). TDM timing predictable, simplifies worst-case analysis easy implement. However, it introduces a constant, periodic non-work-conserving resource scheme. This challenges efficiency whenever applications expose dynamics execution time, communication volume system not highly loaded. In this work, we present flexible approach for NoCs where...
Many industrial players are currently challenged in building distributed CPS and IoT applications with stringent end-to-end QoS requirements. Examples Vehicle-to-X applications, Advanced Driver-Assistance Systems (ADAS) or functionalities the Industrial Internet of Things (IIoT). Currently, there is no comprehensive solution allowing to efficiently program, deploy, operate such applications. This paper will focus on real-time concerns, systems. Thereby, lies, one hand, mechanisms required...
The integration trend and increased required computing power is driving the advent of common embedded consumer devices like MPSoCs platforms in safety critical domain. often feature a shared tightly-coupled memory system where careful management data storage transfers key enabler for performance. However, providing real-time guarantees these extremely challenging as they rely on exploiting locality to improve average latencies shared-memory architectures. This effect disregarded by existing...
Precision time protocol (PTP) is one of the most widely used protocols for clock synchronization in packet-switched networks, on which, among others, transaction stock markets relies. PTP was not standardized with security as a core requirement and therefore vulnerable attractive to manifold kinds malicious attacks, such time-delay attacks (TDAs). TDAs, short, corrupt exchange timestamped messages thus cause an incorrect process. The annex P IEEE 1588-2019 standard has defined number...
Networks-on-Chip (NoCs) for real-time systems require solutions a safe and predictable sharing of resources between transmissions with different quality-of service (QoS) requirements. In this work, we present mechanism which allows to apply existing wormhole-switched performance optimized NoCs in safety critical domains, without requiring complex hardware modifications. For purpose, introduce global dynamic admission control implemented the form an access layer, controlling rates at running...
Modern hard real-time systems evolved from isolated single-core architectures to complex multi-core which are often connected in a distributed manner. With the increasing influence of interconnections systems, access behavior shared resources single tasks or cores becomes crucial factor for system’s overall worst-case timing properties. Traffic shaping is powerful technique decrease contention network and deliver guarantees on streams. In this paper we present novel approach automatically...
Explicitly managed memories have emerged as a good alternative for multicore processors design in order to reduce energy and performance costs. Memory transfers then rely on Direct Access (DMA) engines which provide hardware support accelerating data. However, programming explicit data is very challenging developers who must manually orchestrate movements through the memory hierarchy. This practice error-prone can easily lead inconsistency. In this paper, we propose runtime approach...