This article presents a 5G 37-42-GHz 8 × phased array. The array is based on 2 SiGe transmit/receive (TRX) beamformer chips in the technology with 6 bits of phase control and gain control. A detailed study presented, showing effects array-level amplitude errors radiated error vector magnitude (EVM) 64-element arrays. scans to ±60° azimuth plane ±50° elevation low sidelobes. measured peak effective isotropic power (EIRP) 51 dBm at Psat 3-dB bandwidth 36-41.5 GHz. 39-GHz communication system...

The characteristics of high-speed LiNbO/sub 3/ electrooptic interferometric modulators/switches are discussed from the viewpoint optimization device performance. Specific calculations impedance, effective microwave index, and attenuation parameter presented as a function electrode parameters including buffer layer thickness. authors have found that procedure is considerably simplified when range satisfy given bandwidth requirement first determined.< <ETX...

This article presents a two-channel 70-110-GHz frequency quadrupler in the GF8HP 0.12-μm SiGe BiCMOS process. The ×4 multiplication is based on cascaded doublers with an interstage bandpass filter to reject undesired harmonics. measured peak output power -1.5 3 dBm at 70-110 GHz, worst case harmonic rejection ratio (HRR) of >30 dBc. chip size 1.9 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and consumes 240 mW for operation. To...

This paper presents a 10-40 GHz wideband frequency quadrupler in GF8HP 0.13 μm SiGe BiCMOS process. Three bands (low-, mid-, and high-band) are implemented on-chip for operation. An 4-pole switchable elliptic bandpass filter is also used to result greatly improved harmonic rejection ratio (HRR). The measured worstcase HRR 32-48 dBc at 11-40 with an output power of +1 -8 dBm P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">in</sub> = 1 (25-32 dB...

This article presents a packaged SiGe BiCMOS reflectometer for 0.01-26-GHz two-port vector network analyzers (VNAs). The chip is composed of resistive bridge coupler and two wideband heterodyne receivers coherent magnitude phase detection. In addition, high-linearity receiver channel designed to accommodate ~20 dBm RF input power the reflectometer. External sources are used provide stimulus over entire bandwidth, shunt 50-Ω switch placed at each matched condition better measurement accuracy....

This article presents a low-power, high-gain, high-linearity phased-array transmit (Tx) beamformer chip in 45-nm RFSOI process. An architecture employing power amplifier with neutralization, 180° active phase shifter and 11/22/45/90° passive result high linearity low consumption. The measured gain is 22 dB 3-dB bandwidth of 57.5-65.5 GHz an OP1dB OPsat 7.5-10 dBm 9.5-11.5 at 57-64 GHz, respectively. A peak power-added efficiency (PAE) 14.6% 17.6% 60 achieved P <sub...

This paper presents a single-chip 0.01-26 GHz reflectometer for two-port vector network analyzers (VNA). The consists of bridge coupler integrated together with two wideband heterodyne receivers. For operation, resistive is used directivity 33 dB up to 26 GHz. Also, high-linearity receiver channel designed so as accommodate 10 dBm RF input power the reflectometer. SiGe chip 1.8 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and...

This paper presents a 70–110 GHz single-chip SiGe reflectometer for one-port vector network analyzer (VNA). Two directional couplers are implemented together with two high-linearity heterodyne receivers on single chip at GHz. In addition, x4 frequency multiplier chain is also the same chip. A CPW (Coplanar Waveguide) coupled-line used shielded gound plane improved isolation and directivity. The dynamic range of receiver 110–115 dB 10 back-off Hz resolution bandwidth (RBW). 5.86 mm <sup...

This paper presents a wideband 4-channel 10-40 GHz receiver (RX) with integrated LO quadrupler and flip-chip packaging in GF8HP 0.12um SiGe BiCMOS technology. The system-level measurements are done the chip flipped on low cost RF board. Each channel results 20-37 dB power conversion gain 3-dB bandwidth (BW) of GHz. measured single-sideband noise figure (SSB NF) input PldB at center frequency 25 9.3 (and 8.2 dB) -17.2 dBm -33 dBm), respectively, high) mode. To our knowledge, this represents...

A novel tunable microwave photonic FIR filter incorporating a wavelength spacing multiwavelength based on programmable arrayed micro-mirror device (AMMD) is demonstrated. Owing to the unique characteristic of AMMD, that an arbitrary optical shape can be produced by defining desired spatial pattern array ∼800 000 micro-mirrors, filtering readily obtainable. By controlling spacing, flexible resonance RF frequency tuning achieved over range 2.3 GHz.

This paper presents a 40-100 GHz wideband direct conversion IQ modulator with correction capability and flip-chip packaging in GF8HP 0.12μm SiGe BiCMOS technology. The chip covers Q-, V-, E-, W-bands is flipped on low-cost RF board for connectorized measurements. measured gain 5-8 dB at an OP1dB of -2 to -5 dBm. A single-sideband (SSB) rejection higher than 42 dBc LO leakage better 35 measured. 64-QAM modulated waveform data rate 12 Gb/s (2Gbaud/s) 2.4% error vector magnitude (EVM)...

This paper presents a 35-105 GHz wideband direct conversion IQ receiver and 30-105 IF with integrated LO doubler in GF8HP 0.12-μm SiGe BiCMOS technology. Both chips cover Q-, V-, E-, W-bands are flipped on low cost RF board for connectorized measurements. The measured flat gain of 21-33 dB at double-sideband (DSB) noise figure (NF) 5-12 dB. With the on-chip I/Q phase-error correction, maintains better than 40 dBc image-rejection-ratio (IRR) over entire bandwidth. demonstrates 18-33 similar...

This paper presents a 25–29 GHz 64-element small-cell (RF to IF) dual-polarized/dual-beam phased-array for 5G communication systems. The includes dual-polarized antennas, sixteen 2 × beamformers, dual-channel driver (TX/RX), transceiver, filters, and local oscillator (LO) on the printed-circuit board. provides measured EIRPPsat of 55 dBm each polarization with <-40 dBc LO leakage at an IF > 4 GHz, 40–140 single-sideband rejection 2–8 GHz. TX output spectrum is 5 6 all spurs are < -55 dB...

This paper presents a complete 5G phased-array base-station, which consists of 2×32 element phased-arrays, each with vertical and horizontal polarization (V&H) for MIMO operation. The array is based on high performance 24-30 GHz 2×2 beamformer chips 22-44 wideband up/down-conversion transceiver chips, are placed the same PCB all other supporting circuitry. An EIRP 44-46 dBm measured at 25-30 GHz, -35 to -40 dBc LO leakage, <; -30 cross-polarization levels, 40-100 single-sideband rejection....

This paper presents a low-power, low-noise, high-linearity 4-channel phased-array receiver in 45 nm RFSOI process. An architecture employing an active low-noise balun, 180° phase-shifter, and 11/22/45/90° passive phase-shifters results optimal performance between noise figure power consumption. The front-end channel consumes 28 mW from 1 V supply, with measured gain NF of 14 dB 3.6 at 59 GHz, respectively (NF 3.6-4 57-64 GHz). four receive channels are followed by down-conversion mixer IF...

The microwave characteristics of a traveling-wave electrode in electrooptic modulators on z-cut LiNbO/sub 3/ crystals with buffer layers various dielectric constants are calculated by quasi-TEM analysis. theoretical results compared the measured for coplanar waveguide (CPW) electrodes. agreement between and is good.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A 25–29 GHz phased-array with embedded filter, driver, up/down-converter and mm-wave PLL is presented. This work based on two separate chips, a 2×2 SiGe BiCMOS beamformer chip 14–15 dBm of output power per channel wideband low phase noise. These chips are assembled carrier printed-circuit board containing high efficiency stacked-microstrip antennas, 16:1 low-loss Wilkinson network, high-Q filter to remove any spurious harmonics mixing spurs from the up/down-converter, all other supporting...

This paper presents studies on the self-interference level of a 28-GHz full-duplex phased-array system. The system consists two 64-element phased-arrays and canceller. are designed with 2×2 beamformer chips, arrays used as transmitter receiver cross-polarization set-up. canceller is also based same chip multiple-delay taps. full duplex front-end results in 57-dB isolation between transmitting receiving at 28.5-29.5 GHz without saturating any LNAs. requires only 16-dB additional digital...

The small-signal frequency responses of the 1*2 and 2*2 directional coupler traveling-wave modulators are analyzed in closed forms including effect both optical/microwave velocity mismatch microwave loss. When loss is negligible, bandwidths 20 28%, respectively, larger than that an interferometric modulator with same electrode length. However, when large, has a bandwidth.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

This study presents a novel time-domain characterization method for the first time, to reveal dynamic charge behavior of HBTs. The model plays an important role in power InGaP-GaAs HBT amplifiers designed with self-biasing. It is shown that charge-storage and extraction from base at high-power drive cannot be described by conventional quasi-static model. A new collector-base proposed account time-response devices.

Transient effects in low-noise dispersion-compensating hybrid fiber amplifier (DC-HFA) are presented to show the combined dynamics of EDFA and Raman amplifier. A gain control method is demonstrated DC-HFA by numerical simulation, advantages discussed.

This paper presents an active bi-directional monopulse comparator at 28 GHz. The four inputs from the antenna quads are first divided and fed into two 2×2 TRX beamformer chips to perform sum (Δ) or delta operation in either azimuth elevation planes. A symmetrical input output RF routing with multi-layer crossovers is implemented for wideband performance. amplitude phase mismatch due both on-chip variation off-chip calibrated out a single-point calibration GHz using fine-step VGA shifters...