In this work, we present a hardware neural network with capacitor-based synaptic devices. A device was developed using MOS capacitor structure charge trapping layer. Due to the flat band voltage shift by and its non-linear <inline-formula> <tex-math notation="LaTeX">${C} - {V}$ </tex-math></inline-formula> characteristics, multilevel weight values could be implemented occurring when charging discharging capacitor. The vector-matrix multiplication (VMM) function also experimentally verified...

Spiking neural networks (SNNs) have attracted many researchers’ interests due to its biological plausibility and event-driven characteristic. In particular, recently, studies on high-performance SNNs comparable the conventional analog-valued (ANNs) been reported by converting weights trained from ANNs into SNNs. However, unlike ANNs, an inherent latency that is required reach best performance because of differences in operations neuron. SNNs, not only spatial integration but also temporal...

Hydrogen gas storage place has been increasing daily because of its consumption. is a dream fuel the future with many social, economic and environmental benefits to credit. However, hydrogen tanks exploded accidentally significantly lost economy, infrastructure, living beings. In this study, protection wall under worst-case scenario explosion tank was analyzed commercial software LS-DYNA. TNT equivalent method used calculate weight for Hydrogen. Reinforced concrete composite different...

In this paper, we proposed Omega-Shaped-Gate Nanowire Field Effect Transistor (ONWFET) with different gate coverage ratio (GCR). order to investigate electrical and self-heating characteristics of the devices, on-current, off-current, subthreshold swing (SS), operating temperature were examined by using 3D TCAD simulator compared nanowire MOSFET (NW-MOSFET). As a result, possibility reducing off-current was demonstrated ONWFET 40% GCR. Therefore, can save power consumption serve as low...

The spiking neural network (SNN) is regarded as the third generation of an artificial (ANN). In order to realize a high-performance SNN, integrate-and-fire (I&amp;F) neuron, one key elements in must retain overflow its membrane after firing. This paper presents analog CMOS I&amp;F neuron circuit for retaining. Compared with conventional circuit, basic operation proposed confirmed circuit-level simulation. Furthermore, single-layer SNN simulation was also performed demonstrate effect on...

In this paper, we demonstrate retention improvement in nonvolatile charge-trapping memory cells by tunneling oxide engineering with Al2O3. By utilizing SiO2/Al2O3/SiO2 layers for the oxide, it is shown that threshold voltage window after 10 years significantly improved from 0.78 V to 4.18 through Synopsys Sentaurus technology computer-aided design simulation. addition, incorporating compared using SiO2/Si3N4/SiO2 layers. The relationship between layer thickness and trapped charge emission...

We propose a novel vector-matrix multiplication (VMM) architecture based on NAND synaptic array using pMOSFET which is an analog switch shape cell for neural network (NN) applications. A FLASH memory string consisting of and not to open string. cell's resistance can be modulated by threshold voltage (Vth) depending the amount trapped charge when input signal applies. If there no spike, turned off acts as pass gate so that only constant drop exists. Based this pair series, we confirm VMM...

A poly-Si overpass channel synaptic (OCS) transistor is proposed for the extremely-low-power operation and low RC delay of neuromorphic systems. The OCS has two major structural advantages. First, on- current ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{\text {on}}{)}$ </tex-math></inline-formula> can be reduced to sub 100 nA with high on/off ratio notation="LaTeX">$10^{{5}}{)}$ because wraps...

In this paper, we proposed and fabricated a polysilicon-based four-terminal synaptic transistor. The device has an asymmetric dual-gate structure. top gate, which uses thin SiO₂ layer as the gate dielectric, is input terminal of transistor, receives spikes from pre-synaptic neurons. Meanwhile, nitride trapping was inserted between channel bottom to serve non-volatile memory. node that post-neuron feedback signals adjusts weight. With double-gate structure, artificial synapse can perform...

NOR/AND flash memory was studied in neuromorphic systems to perform vector-by-matrix multiplication (VMM) by summing the current. Because size of cells exceeds those other memristor synaptic devices, we proposed a 3D AND-type stacked array reduce cell size. Through tilted implantation method, conformal sources and drains each could be formed, with confirmation technology computer aided design (TCAD) simulation. In addition, cell-to-cell variation due etch slope eliminated controlling...

In this paper, we demonstrate the characteristics of floating body effect poly-silicon with grain boundary by SENTAURUS™ TCAD simulation. As drain voltage increases, impact ionization occurs at drain-channel junction. And these holes created are deposited on bottom to change threshold voltage. This feature, kink effect, is also observed in fully depleted silicon insulator because serve as a storage trap holes. We simulate transfer curve depending density and position boundary. The affects...

Li-metal batteries, often heralded as the next frontier in energy storage technology, boast remarkable characteristics such high density. Unlike traditional lithium-ion batteries incorporate a lithium-metal anode, which significantly enhances their This higher density translates to substantial increase amount of that can be stored given volume or weight, paving way for more powerful and longer-lasting solutions[1–3]. However, significant shortcomings do exist, uneven Li-Metal deposition,...

The classic ‘pseudo-2-dimensional’ (p2D) model of Newman and co-workers (also known as the DFN model), with its different efficient implementations, is state-of-the-art physics-based electrochemical for lithium-ion batteries. COMSOL Multiphysics (COMSOL) a popular modeling software multiphysics simulations, Battery Design Module Li-ion batteries widely used in battery community. This work presents step-wise development reconstructing detailed p2D equations. includes variable parameters...

In this paper, we investigated the dependence of minority carrier lifetime on dual gate FBFET. Generally, depending channel condition or trap density, can be degraded. Since potential barrier lowering through accumulated carriers is essential for positive feedback, deterioration make a critical influence operation device. Therefore, verified tendency threshold voltage according to and length. Through comparison with p-n diode FBFET, drew relation between voltage. As result, it has been...

In this paper, we investigate the floating body effect (FBE) in fully depleted polysilicon-body ultrathin-body MOSFETs. Generally, FBE cannot occur a body. However, demonstrate that an FBE-like phenomenon can be observed MOSFETs due to grain boundaries of polysilicon. To analyze this, devices with various conditions were fabricated and measured. As result, may argue generated holes trapped at boundaries, which causes phenomenon. Based on expect thin-polysilicon utilized for applications such...

In this paper, we propose a floating-gate-based synaptic transistor with two independent control gates that implement both offline and online learning. Unlike previous research on double-gated transistors, the proposed device is capable of learning without facing fan-out problem. Basic operation was verified program/erase scheme based Fowler-Northeim tunneling suggested for multi-conductance utilization device. With P/E scheme, an offline-trained single-layered hardware-based spiking neural...

A systematic device-model calibration (extraction) methodology has been proposed to reduce parameter time of advanced compact model for modern nano-scale semiconductor devices. The adaptive pattern search algorithm is a variant the direct method, which explore in space with searching step and direction. It very straightforward, but powerful, high dimensional optimization problem since direction are decided by simple computation. method iterates less shows superior accuracy over conventional...

In this paper, we analyze hot carrier injection (HCI) in an asymmetric dual gate structure with a charge storage layer. floating device, holes injected by HCI can move freely the valence band, since channel potential is constant. case of trapping layer, however, are trapped only drain side where impact ionization occurs. Therefore, small threshold voltage shift occurs because formation enhanced side. When length under 100 nm, start to control whole channel. Thus, expect that into layer be...

Large-format cells are achieving increasing popularity for Electric Vehicle (EV) applications to maximize volumetric and gravimetric energy densities. These large batteries often characterized by spatial non-uniformities in temperature resulting difficulties maintaining uniform distribution. This poor thermal management is a primary reason the inefficient performance safety risks associated with these format battery packs. Further, there have been several reported degradation mechanisms...

In neuromorphic system, the major key factors for synaptic devices are current reduction and scaling when calculating vector-matrix multiplication (VMM) through sum. This paper explores an overpass channel device with asymmetric gate which can increase effective length due to reduce operate stable multi-bit conductance levels. addition, cell size be reduced by half, combining top line drain into a 3-terminal structure. We proved control individual using Fowler-Nordheim (FN) tunneling TCAD...

It is important to minimize the non-ideal effects of weight transfer in spiking neural network (SNN) inference, e.g., displacement currents from word/bit line transitions, and synaptic off-state currents. A novel system for SNN inference that locally synchronizes controls asynchronous input spike voltages pre-layer proposed. The improvement accuracy verified using current profile a 92 WL-stacked 3D-NAND flash memory cell.