Soheil Salehi

ORCID: 0000-0001-5998-8795
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About
Contact & Profiles
Research Areas
  • Advanced Memory and Neural Computing
  • Magnetic properties of thin films
  • Ferroelectric and Negative Capacitance Devices
  • Physical Unclonable Functions (PUFs) and Hardware Security
  • Sparse and Compressive Sensing Techniques
  • Advanced Malware Detection Techniques
  • Integrated Circuits and Semiconductor Failure Analysis
  • Experimental Learning in Engineering
  • Semiconductor materials and devices
  • Blind Source Separation Techniques
  • Advancements in Semiconductor Devices and Circuit Design
  • Information and Cyber Security
  • Parallel Computing and Optimization Techniques
  • Adversarial Robustness in Machine Learning
  • Security and Verification in Computing
  • Neural Networks and Reservoir Computing
  • Engineering Education and Technology
  • Digital Transformation in Industry
  • Engineering Education and Pedagogy
  • VLSI and Analog Circuit Testing
  • Innovative Teaching Methods
  • Advanced Data Storage Technologies
  • Network Security and Intrusion Detection
  • Biomedical and Engineering Education
  • Cryptographic Implementations and Security

University of Arizona
2023-2024

University of Central Florida
2015-2024

University of North Texas at Dallas
2024

West Texas A&M University
2024

University of North Texas
2024

California State University, Long Beach
2024

The University of Texas at Tyler
2024

Nasional University
2024

University of Illinois Urbana-Champaign
2024

California State Polytechnic University
2024

With the growth and globalization of IC design development, there is an increase in number Designers Design houses. As setting up a fabrication facility may easily cost upwards $20 billion, costs for advanced nodes be even greater. houses that cannot produce their chips in-house have no option but to use external foundries are often other countries. Establishing trust with these can challenge, assumed untrusted. The untrusted global semiconductor supply chain has raised concerns about...

10.1145/3579823 article EN ACM Transactions on Embedded Computing Systems 2023-01-18

Spin-transfer torque (STT) random access memory has been researched as a promising alternative for static in reconfigurable fabrics, particularly lookup tables (LUTs), due to its nonvolatility, low standby and power, high integration density features. In this brief, we leverage physical characteristics of magnetic tunnel junctions (MTJs) design unique reference MTJ which calibrated resistance matching the STT-based LUT (STT-LUT) circuit requirements provide optimal reading operation. Results...

10.1109/tcsii.2016.2532099 article EN IEEE Transactions on Circuits & Systems II Express Briefs 2016-02-18

An increase in demand for semiconductor ICs, recent advancements machine learning, and the slowing down of Moore's law have all contributed to increased interest using Machine Learning (ML) enhance Electronic Design Automation (EDA) Computer-Aided (CAD) tools processes. This paper provides a comprehensive survey available EDA CAD tools, methods, processes, techniques Integrated Circuits (ICs) that use learning algorithms. The ML-based EDA/CAD are classified based on IC design steps. They...

10.1145/3526241.3530834 article EN Proceedings of the Great Lakes Symposium on VLSI 2022 2022-06-02

The Fourth Industrial Revolution (4IR) technologies, such as cloud computing, machine learning, and AI, have improved productivity but introduced challenges in workforce training reskilling. This is critical given existing shortages, especially marginalized communities like Underrepresented Minorities (URM), who often lack access to quality education. Addressing these challenges, this research presents gAI-PT4I4, a Generative AI-based Personalized Tutor for 4.0, designed personalize 4IR...

10.48550/arxiv.2502.14080 preprint EN arXiv (Cornell University) 2025-02-19

Spin-Transfer Torque Random Access Memory (STT-MRAM) has been explored as a post-CMOS technology for embedded and data storage applications seeking non-volatility, near-zero standby energy, high density. Towards attaining these objectives practical implementations, various techniques to mitigate the specific reliability challenges associated with STT-MRAM elements are surveyed, classified, assessed in this article. Cost suitability metrics include area of nanomagmetic CMOS components per...

10.1145/2997650 article EN ACM Journal on Emerging Technologies in Computing Systems 2017-04-20

The globalization of the manufacturing process and supply chain for electronic hardware has been driven by need to maximize profitability while lowering risk in a technologically advanced silicon sector. However, many IPs' security features have broken because rise successful attacks. Existing efforts frequently ignore numerous dangers favor fixing particular vulnerability. This inspired development unique method that uses emerging spin-based devices obfuscate circuitry secure intellectual...

10.1109/tcsi.2024.3364160 article EN IEEE Transactions on Circuits and Systems I Regular Papers 2024-02-22

The Internet of Things (IoT) has brought about unprecedented connectivity and convenience in our daily lives, but with this newfound interconnectedness comes the threat cyber-attacks. With ever-increasing IoT devices being connected to internet, securing is becoming increasingly urgent. Machine learning (ML) among most popular techniques used by intrusion detection systems (IDS) enhance their performance when IoT. However, a key obstacle ML-based IDS for from nonstationary streaming data,...

10.1145/3583781.3590271 article EN Proceedings of the Great Lakes Symposium on VLSI 2022 2023-05-31

A laboratory pedagogy interweaving weekly student portfolios with onsite formative electronic assessments (ELAs) is developed and assessed within the component of a required core course electrical computer engineering (ECE) undergraduate curriculum. The approach acts to promote outcomes, neutralize academic integrity violations, while refocusing instructor teaching assistant roles toward high-gain instructional activities, such as personalized tutoring. mixed-method study evaluated learning...

10.1109/te.2017.2706667 article EN IEEE Transactions on Education 2017-06-06

This paper devises a novel adaptive framework for the energy-aware acquisition of spectrally sparse signals. The quantized compressive sensing (CS) techniques, beyond-complementary metal-oxide-semiconductor (CMOS) hardware architecture, and corresponding algorithms which utilize them have been designed concomitantly to minimize overall cost signal acquisition. First, spin-based intermittent quantizer (AIQ) is developed facilitate realization sampling technique. Next, smart determination rate...

10.1109/jetcas.2018.2857998 article EN publisher-specific-oa IEEE Journal on Emerging and Selected Topics in Circuits and Systems 2018-07-23

The security and trustworthiness of ICs are exacerbated by the modern globalized semiconductor business model. This model involves many steps performed at multiple locations different providers integrates various Intellectual Properties (IPs) from several vendors for faster time-to-market cheaper fabrication costs. Many existing works have focused on mitigating well-known SAT attack its derivatives. Power Side-Channel Attacks (PSCAs) can retrieve sensitive contents IP be leveraged to find...

10.1145/3489517.3530414 article EN Proceedings of the 59th ACM/IEEE Design Automation Conference 2022-07-10

The continuous increase in transistor density based on Moore's Law has led us to Complementary Metal-Oxide Semiconductor (CMOS) technologies beyond 45nm process node. These highly-scaled offer improved as well a reduction nominal supply voltage. New challenges also arise, such relative proportion of leakage power standby mode. In this paper, we present an analysis regarding different aspects and 15nm technologies, consumption cell area compare these two technologies. For purpose, IEEE 754...

10.1109/secon.2015.7132972 article EN SoutheastCon 2015-04-01

Maximizing profits while minimizing risk in a technologically advanced silicon industry has motivated the globalization of fabrication process and electronic hardware supply chain. However, with increasing magnitude successful attacks, security many IPs been compromised. Many existing works have focused on resolving single vulnerability neglecting other threats. This to propose novel approach for securing during chain via logic obfuscation by utilizing emerging spin-based devices. Our...

10.1109/dac18074.2021.9586242 article EN 2021-11-08

While inclusion of emerging technology-based Non-Volatile Memory (NVM) devices in on-chip memory subsystems offers excellent potential for energy savings and scalability, their sensing vulnerability creates Process Variation (PV) challenges. This paper presents a circuit-architecture cross-layer solution to realize radically-different approach leveraging as-built variations via specific Sense Amplifier (SA) design use. novel approach, referred as Self-Organized Sub-bank (SOS) design, assigns...

10.1109/tetc.2018.2799005 article EN IEEE Transactions on Emerging Topics in Computing 2018-01-25

Large-scale transformer-based models like the Bidi-rectional Encoder Representations from Transformers (BERT) are widely used for Natural Language Processing (NLP) applications, wherein these initially pre-trained with a large corpus millions of parameters and then fine-tuned downstream NLP task. One major limitations large-scale is that they cannot be deployed on resource- constrained devices due to their model size increased inference latency. In order overcome limitations, such can...

10.1109/icmla58977.2023.00104 article EN 2023-12-15

This paper devises a novel Analog to Digital Converter (ADC) framework for energy-aware acquisition of analog signals with Logic-in-Memory capabilities. The beyond-CMOS hardware architecture has been designed minimize the overall cost signal acquisition. Spin-Hall Effect driven Domain Wall Motion (SHE-DWM) devices are utilized realize proposed called Spin-based Logic-In-Memory ADC (SLIM-ADC). Our simulation results indicate that SLIM-ADC offers ∼200 fJ energy consumption on average each...

10.1016/j.mejo.2018.09.012 article EN publisher-specific-oa Microelectronics Journal 2018-10-01

Obfuscation stands as a promising solution for safe-guarding hardware intellectual property (IP) against spectrum of threats including reverse engineering, IP piracy, and tampering. In this paper, we introduce Obfus-chat, novel framework leveraging Generative Pre-trained Transformer (GPT) models to automate the obfuscation process. The proposed accepts design netlists key sizes inputs, autonomously generates obfuscated code tailored enhance security. To evaluate effectiveness our approach,...

10.1109/dcas61159.2024.10539877 article EN 2024-04-19

Recent advances to hardware integration and realization of highly-efficient Compressive Sensing (CS) approaches have inspired novel circuit architectural-level approaches. These embrace the challenge design more optimal nonuniform CS solutions that consider device-level constraints for IoT applications wherein lifetime energy, device area, manufacturing costs are highly-constrained, but meanwhile, sensing environment is rapidly changing. In this manuscript, we develop a adaptive...

10.1109/isvlsi.2019.00079 article EN 2019-07-01

In this paper, we develop a 6-input fracturable non-volatile Clockless LUT (C-LUT) using spin Hall effect (SHE)-based Magnetic Tunnel Junctions (MTJs) and provide detailed comparison between the SHE-MTJ-based C-LUT Spin Transfer Torque (STT)-MTJ-based C-LUT. The proposed offers an attractive alternative for implementing combinational logic as well sequential versus previous spin-based designs in literature. Foremost, eliminates sense amplifier typically employed by differential polarity dual...

10.1145/3299874.3318038 article EN Proceedings of the Great Lakes Symposium on VLSI 2022 2019-05-13

10.1145/3649476.3660380 article EN Proceedings of the Great Lakes Symposium on VLSI 2022 2024-06-10

The onset of Industry 4.0 is rapidly transforming the manufacturing world through integration cloud computing, machine learning (ML), artificial intelligence (AI), and universal network connectivity, resulting in performance optimization increase productivity. Digital Twins (DT) are one such transformational technology that leverages software systems to replicate physical process behavior, representing a digital environment. This paper aims explore use photogrammetry (which reconstructing...

10.48550/arxiv.2407.18951 preprint EN arXiv (Cornell University) 2024-07-12

Hardware-based acceleration approaches for Machine Learning (ML) workloads have been embracing the significant potential of post-CMOS switching devices to attain reduced footprint and/or energy-efficient execution relative transistor-based GPU TPU-based accelerator architectures. Meanwhile, promulgation fabless IC chip manufacturing paradigms has heightened hardware security concerns inherent in such approaches. Namely, unauthorized access various supply chain stages may expose...

10.3389/felec.2024.1409548 article EN cc-by Frontiers in Electronics 2024-08-07

Hardware attacks on resource-constrained IoT devices are evolving rapidly. These threats have become a significant concern due to the increase of used in applications such as human health, public transportation, autonomous vehicles, defense, and environmental monitoring. Recent studies show potential using deep learning steal user data by monitoring hardware features side-channel information. Additionally, machine (ML) approaches recently been widely adopted applications. Advanced platforms...

10.1109/newcas52662.2022.9842256 article EN 2022 20th IEEE Interregional NEWCAS Conference (NEWCAS) 2022-06-19
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