This retrospective paper describes the RowHammer problem in dynamic random access memory (DRAM), which was initially introduced by Kim et al. at ISCA 2014 Conference. is a prime (and perhaps first) example of how circuit-level failure mechanism can cause practical and widespread system security vulnerability. It phenomenon that repeatedly accessing row modern DRAM chip causes bit flips physically adjacent rows consistently predictable locations. caused hardware called disturbance errors,...

Seed location filtering is critical in DNA read mapping, a process where billions of fragments (reads) sampled from donor are mapped onto reference genome to identify genomic variants the donor. State-of-the-art mappers 1) quickly generate possible mapping locations for seeds (i.e., smaller segments) within each read, 2) extract sequences at locations, and 3) check similarity between its associated with computationally-expensive algorithm sequence alignment) determine origin read. A seed...

Modern DRAM-based systems suffer from significant energy and latency penalties due to conservative DRAM refresh standards. Volatile cells can retain information across a wide distribution of times ranging milliseconds many minutes, but each cell is currently refreshed every 64ms account for the extreme tail end retention time distribution, leading high overhead. Due poor technology scaling, this problem expected get worse in future device generations. Hence, current approach refreshing all...

RowHammer is a circuit-level DRAM vulnerability, first rigorously analyzed and introduced in 2014, where repeatedly accessing data row can cause bit flips nearby rows. The vulnerability has since garnered significant interest both computer architecture security research communities because it stems from physical interference effects that worsen with continued density scaling. As manufacturers primarily depend on scaling to increase capacity, future chips will likely be more vulnerable...

Physically Unclonable Functions (PUFs) are commonly used in cryptography to identify devices based on the uniqueness of their physical microstructures. DRAM-based PUFs have numerous advantages over PUF designs that exploit alternative substrates: DRAM is a major component many modern systems, and can generate unique identiers. However, none prior proposals provide implementations suitable for runtime-accessible evaluation commodity devices. Prior exhibit unacceptably high latencies,...

We propose a new DRAM-based true random number generator (TRNG) that leverages DRAM cells as an entropy source. The key idea is to intentionally violate the access timing parameters and use resulting errors source of randomness. Our technique specifically decreases row activation latency (timing parameter t R D ) below manufacturer recommended specifications, induce read errors, or failures, exhibit behavior. then aggregate data from multiple obtain TRNG capable providing high throughput...

Genome sequence analysis has enabled significant advancements in medical and scientific areas such as personalized medicine, outbreak tracing, the understanding of evolution. To perform genome sequencing, devices extract small random fragments an organism's DNA (known reads). The first step is a computational process known read mapping. In mapping, each fragment matched to its potential location reference with goal identifying original genome. Unfortunately, rapid sequencing currently...

Aggressive memory density scaling causes modern DRAM devices to suffer from RowHammer, a phenomenon where rapidly activating (i.e., hammering) row can cause bit-flips in physically-nearby rows. Recent studies demonstrate that DDR4/LPDDR4 chips, including chips previously marketed as RowHammer-safe, are even more vulnerable RowHammer than older DDR3 chips. Many works show attackers exploit reliably mount system-level attacks escalate privilege and leak private data. Therefore, it is critical...

Generating the hash values of short subsequences, called seeds, enables quickly identifying similarities between genomic sequences by matching seeds with a single lookup their values. However, these can be used only for finding exact-matching as conventional hashing methods assign distinct different including highly similar seeds. Finding causes either (i) increasing use costly sequence alignment or (ii) limited sensitivity. We introduce

DRAM has been the dominant technology for architecting main memory decades. Recent trends in multi-core system design and large-dataset applications have amplified role of as a critical bottleneck. We propose Copy-Row (CROW), flexible substrate that enables new mechanisms improving performance, energy efficiency, reliability. use CROW to implement 1) low-cost in-DRAM caching mechanism lowers activation latency frequently-accessed rows by 38% 2) avoids short-retention-time mitigate...

Main memory, composed of DRAM, is a performance bottleneck for many applications, due to the high DRAM access latency. In-DRAM caches work mitigate this latency by augmenting regular-latency with small-but-fast regions that serve as cache data held in (i.e., slow) region DRAM. While an effective in-DRAM can allow large fraction memory requests be served from fast region, savings are often hindered inefficient mechanisms migrating relocating) copies into and out regions. Existing have two...

Long reads produced by third-generation sequencing technologies are used to construct an assembly (i.e., the subject's genome), which is further in downstream genome analysis. Unfortunately, long have high error rates and a large proportion of bps these incorrectly identified. These errors propagate affect accuracy Assembly polishing algorithms minimize such propagation or fixing using information from alignments between read-to-assembly alignment information). However, can only polish...

Experimental characterization of DRAM errors is a powerful technique for understanding behavior and provides valuable insights improving overall system performance, energy efficiency, reliability. Unfortunately, recent technology scaling issues are forcing manufacturers to adopt on-die error-correction codes (ECC), which pose significant challenge error studies by obfuscating raw distributions using undocumented, proprietary, opaque hardware. As we show in this work, observed devices with...

RowHammer is a circuit-level DRAM vulnerability where repeatedly accessing (i.e., hammering) row can cause bit flips in physically nearby rows. The worsens as cell size and cell-to-cell spacing shrink. Recent studies demonstrate that modern chips, including chips previously marketed RowHammer-safe, are even more vulnerable to than older such the required hammer count flip has reduced by 10X last decade. Therefore, it essential develop better understanding in-depth insights into of...

Bitwise operations are an important component of modern day programming. Many widely-used data structures (e.g., bitmap indices in databases) rely on fast bitwise large bit vectors to achieve high performance. Unfortunately, existing systems, regardless the underlying architecture CPU, GPU, FPGA), throughput such bulk is limited by available memory bandwidth. We propose Buddy, a new mechanism that exploits analog operation DRAM perform completely inside chip. Buddy consists two components....

Long DRAM access latency is a major bottleneck for system performance. In order to data in DRAM, memory controller (1) activates (i.e., opens) row of cells cell array, (2) restores the charge activated back their full level, (3) performs read and write operations row, (4) precharges array prepare next activation. The restoration operation responsible large portion (up 43.6%) total latency. We find two frequent cases where performed by do not need fully restore level cells, which we can...

Increasing single-cell DRAM error rates have pushed manufacturers to adopt on-die error-correction coding (ECC), which operates entirely within a chip improve factory yield. The ECC function and its effects on reliability are considered trade secrets, so only the manufacturer knows precisely how alters externally-visible characteristics. Consequently, obstructs third-party customers (e.g., test engineers, experimental researchers), who typically design, test, validate systems based these...

The RowHammer vulnerability in DRAM is a critical threat to system security. To protect against RowHammer, vendors commit security-through-obscurity: modern chips rely on undocumented, proprietary, on-die mitigations, commonly known as Target Row Refresh (TRR). At high level, TRR detects and refreshes potential RowHammer-victim rows, but its exact implementations are not openly disclosed. Security guarantees of mechanisms cannot be easily studied due their proprietary nature.

RowHammer is a circuit-level DRAM vulnerability, where repeatedly activating and precharging row, thus alternating the voltage of row's wordline between low high levels, can cause bit flips in physically nearby rows. Recent chips are more vulnerable to RowHammer: with technology node scaling, minimum number activate-precharge cycles induce flip reduces error rate increases. Therefore, it critical develop effective scalable approaches protect modern systems against RowHammer. To enable such...

Data movement between the main memory and processor is a key contributor to execution time energy consumption in memory-intensive applications. This data bottleneck can be alleviated using Processing-in-Memory (PiM). One category of PiM Processing-using-Memory (PuM), which computation takes place inside array by exploiting intrinsic analog properties device. PuM yields high performance efficiency, but existing techniques support limited range operations. As result, current architectures...

True random number generators (TRNG) sample physical processes to create large amounts of numbers for various use cases, including security-critical cryptographic primitives, scientific simulations, machine learning applications, and even recreational entertainment. Unfortunately, not every computing system is equipped with dedicated TRNG hardware, limiting the application space security guarantees such systems. To open enable overwhelming majority systems that do necessarily have hardware...

AirLift is the first read remapping tool that enables users to quickly and comprehensively map a set, had been previously mapped one reference genome, another similar reference. Users can then run downstream analysis of sets for each latest release. Compared state-of-the-art method reads (i.e., full mapping), reduces overall execution time remap between two genome versions by up 27.4×. We validate our results with GATK find provides high accuracy in identifying ground truth SNP/INDEL variants.

Modern DRAM-based systems suffer from significant energy and latency penalties due to conservative DRAM refresh standards. Volatile cells can retain information across a wide distribution of times ranging milliseconds many minutes, but each cell is currently refreshed every 64ms account for the extreme tail end retention time distribution, leading high overhead. Due poor technology scaling, this problem expected get worse in future device generations. Hence, current approach refreshing all...