A5034918713- Advanced Memory and Neural Computing
- Integrated Circuits and Semiconductor Failure Analysis
- Physical Unclonable Functions (PUFs) and Hardware Security
- Cellular Automata and Applications
- Advancements in Semiconductor Devices and Circuit Design
- Chaos-based Image/Signal Encryption
- Electronic and Structural Properties of Oxides
- Semiconductor materials and devices
- Semiconductor Quantum Structures and Devices
- Advancements in PLL and VCO Technologies
- Digital Media Forensic Detection
- Silicon Carbide Semiconductor Technologies
- Radio Frequency Integrated Circuit Design
- Diamond and Carbon-based Materials Research
- Ferroelectric and Negative Capacitance Devices
GlobalFoundries (United States)
2020-2022
Shenzhen University
2018-2021
Advanced Micro Devices (United States)
2003
Oscillator-based elementary true random number generator (TRNG) uses a slow jittery ring oscillator (RO) to sample fast RO. The ROs are always on but most of the oscillatory cycles RO not sampled into bits. In this paper, new lightweight TRNG design is proposed minimize power wasted by superfluous oscillations. Random bits extracted from both phases increase throughput and activated only during narrow transition time difference between two symmetrically designed ROs. implemented using...
Core–shell semiconductor quantum dots (QDs) are one of the biggest nanotechnology successes so far. In particular, type-I QDs with straddling band offset possess ability to enhance charge carriers capturing which is useful for memory application. Here, core–shell QD-based bipolar resistive switching (RS) anomalous multiple SET and RESET processes was demonstrated. The synergy competition between space limited current conduction (arising from trapping in potential well QDs) electrochemical...
In this paper, we present a fully reconfigurable resistive random access memory (RRAM) physical unclonable function (PUF) based on the truly dynamic entropy of ubiquitous jitter noise, which is intrinsically different from most previously demonstrated PUF implementations with semiconductor fabrication's process variation as static source. addition, proposed RRAM operated by configuring mainstream cells to either high resistance state (for `1') or low `0'), according customized ring...
As burgeoning hardware security primitive, physical unclonable function (PUF) has aroused the interest of solid-state circuit community on its efficient integration into security-critical applications. This paper presents an energy implementation classic arbiter PUF design. Current-starved (CS) inverters are inserted at inputs each multiplexer cell to reduce skew and widen distribution delay difference between two symmetric daisy-chained paths selectable by input challenge. The CS-inverters...
An optimized doping process is used to achieve extremely-low threshold voltage (ELVT) FinFETs for low-power mmWave applications based on 12nm node technology platform. With the VTH ≈ 100mV ELVT FinFET shows 15% IEFF improvement at same VDD compared its super-low (SLVT) counterpart, while mismatch and reliability performances are comparable. FT/FMAX of 305GHz/ 315GHz comparable Maximum Stable Gain (MSG) SLVT gives an advantage 5G applications. Local oscillator (LO) chain blocks investigated...
Low power, lightweight and robust physical unclonable function (PUF) is a sought-after for IoT device identification/authentication. This paper presents low power PUF design with high reliability against temperature supply voltage variations. A response bit extracted by comparing pair of identically designed subthreshold references. The difference due to mismatch digitized registered in bidirectional counter, which can be used identify filter out the unstable bits. readout circuit works...
In this paper, a current mode physical unclonable function (PUF) based on the winner-take-all (WTA) scheme is presented. By using process variation of single transistor in mirror array, digital values with superior randomness can be produced. With proposed WTA scheme, time needed to acquire currents' difference significantly reduced. Meanwhile, overall power consumption also greatly lowered simplified peripheral circuitry. Moreover, unstable bit replacement circuitry customized remove caused...
The suitability of a 12nm FinFET LDMOS offering toward broad range applications has been demonstrated. This work focuses on key reliability aspects with respect to usage conditions typical RF applications. A detailed overview the impact well-known degradation mechanisms, such as conductive and non-conductive Hot Carrier Injection off-state Time Dependent Dielectric Breakdown is presented. conflicting requirements long-life high time zero performance can be resolved through process and/or...
In this paper, we present an ultra-low power true random number generator (TRNG) based on ring oscillator (RO) with current-biased inverters. Random numbers are extracted by symmetrically designed arbiter depending the jitter-noise-caused phase difference of a pair ROs. Using bias transistor shared 16 inverters (8 for each RO), can obtain virtual supply lower than V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DD</sub> (denoted as ) and...
We propose and demonstrate a new device that utilizes quantum well (its dimensions determined by two self-limiting processes) as floating gate. show fast programming erasing can be achieved. Excellent charge retention (ten years) is obtained, for 2.7 nm thin tunneling oxide, at room temperature, 5 oxide even elevated temperature.