IP protection of hardware designs is the most important requirement for many FPGA vendors. To this end, various solutions have been proposed by manufacturers based on idea bitstream encryption. An alternative solution was advocated in (E. Simpson and P. Schaumont, 2006). Schaumont a new approach physical unclonable functions (PUFs) FPGAs. PUFs are unique class systems that extract secrets from complex characteristics integrated circuits which along with properties unclonability provide...

In this paper we propose the idea of using soft decision information in helper data algorithms (HDA). We derive and verify a distribution for responses SRAM-based physically unclonable functions (PUFs) show that becomes available without loss min-entropy fuzzy secret. This significantly improves implementation overhead an SRAM PUF + HDA cryptographic key generation compared to previous constructions.

Arbiter Physically Unclonable Functions (PUFs) have been proposed as efficient hardware security primitives for generating device-unique authentication responses and cryptographic keys. However, the assumed possibility of modeling their underlying challenge-response behavior causes uncertainty about actual applicability. In this work, we apply well-known machine learning techniques on pairs (CRPs) from 64-stage PUFs realized in 65nm CMOS, order to evaluate effectiveness such attacks a modern...

Physical attacks against cryptographic devices typically take advantage of information leakage (e.g., side-channels attacks) or erroneous computations fault injection attacks). Preventing detecting these has become a challenging task in modern research. In this context intrinsic physical properties integrated circuits, such as Physical(ly) Unclonable Functions~(PUFs), can be used to complement classical constructions, and enhance the security devices. PUFs have recently been proposed for...

We present a silicon characterization vehicle implementing six different constructions of intrinsic Physically Unclonable Functions (PUFs). The design contains four memory-based PUFs, one which is novel buskeeper PUF, and two delay-based PUFs. Test chips are fabricated in 65 nm Low Power (LP) technology, using standard cell ASIC flow for the PUFs full custom ones. This test enables comprehensive experimental evaluation individual PUF implementations as well comparative analysis across types...

Silicon aging, in particular NBTI, causes many PUFs to exhibit a natural tendency of growing less reliable over time. This is inconvenient or even unacceptable for in-the-field applications. In case SRAM it observed that the impact NBTI aging depends on data stored SRAM. this work, we investigate effects data-dependent silicon PUF reliability under number realistic scenarios. an accelerated experiment 65nm CMOS implementation scenarios cause smaller reduction than aging. Some show anti-aging...

Currently achievable intellectual property (IP) protection solutions for field-programmable gate arrays (FPGAs) are limited to single large "monolithic" configurations. However, the ever growing capabilities of FPGAs and consequential increasing complexity their designs ask a modular development model, where individual IP cores from multiple parties integrated into larger system. To enable such availability at level is imperative. In this work, we propose an mechanism FPGA cores, by making...

Physical unclonable functions (PUFs) are relatively new security primitives used for device authentication and device-specific secret key generation. In this paper we focus on SRAM- PUFs. The SRAM-PUFs enjoy uniqueness randomness properties stemming from the intrinsic of SRAM memory cells, which is a result manufacturing variations. This can be translated into cryptographic keys thus avoiding need to store manage keys. Therefore these properties, combined with fact that often found in...

CMOS process variations are considered a burden to IC developers since they introduce undesirable random variability between equally designed ICs. However, it was demonstrated that measuring this can also be profitable as physically unclonable method of silicon device identification. This moreover applied generate strong cryptographic keys which intrinsically bound the embedding instance. holds number very interesting advantages in comparison traditional forms secure identification and key...

The efficiency and cost of silicon PUF-based applications, in particular key generators, are heavily impacted by the level reproducibility bare PUF responses under varying operational circumstances. Error-correcting codes can be used to achieve near-perfect reliability, but come at a high implementation especially when underlying is very noisy. When designing generator, more reliable will result less complex ECC decoder smaller footprint, hence an overall efficient implementation. This paper...