Traditional machine translation based on RNN has two major defects: (1)it can only process word-by-word and result in slow training speed; (2)when the sentence is too long, gradient disappearance explosion reduce accuracy of translation. To solve this problem, paper designs a Transformer implemented by PyTorch. Compared with traditional translation, uses attention mechanism to redesign defects effectively solves problems efficiency forgetting. The French-English designed achieves rate 80%...

Lip Reading is the technology of obtaining language content by analyzing change speaker's lip shape and recognizing information movement. reading helps people with hearing disabilities understand what other are saying, which difficult for humans. This paper proposes a novel model using Transformer network, to achieve high accuracy. The main process includes processing data sets, extraction features pre-trained neural then input into network training. Finally, our achieves word-level accuracy...

In this paper, a List Simulated Anneal (LSA) algorithm is proposed for the DAG tasks scheduling on Network-on-chip to simultaneously optimize makespan, load balance and average link load. A task list first created tasks, task-to-processor assignment performed using Best Fit rule. Then generated schedule further optimized LSA. LSA, execution order determined by list, mapping solution simulated annealing. By conducting series of simulation, performance our proposal validated . Comparing random...

Lip-reading technology captures the content of speaker by analyzing characteristics mouth movement. It has a wide application prospect in fields daily life, security and so on. The training lip-reading model relies on large amount data, construction dataset is first step lip-reading. quality greatly affects work whole system. Therefore, this paper carry out research dataset. First all, frames are extracted from original videos using Scikit-Video. Then face detection performed applying dlib....

For the different communications of specific NOC (network on chip) applications, this paper proposes a customized arbitral priority router. This router uses mechanism based lottery algorithm instead RR (round robin) algorithm, which is widely used in arbiter current routers. The can be by users according to communication cases among IPs NOC. Through analysis input ports competing for same output port, it illustrated that distinguish priorities and guarantee response high port. SystemC...

Aiming at the applications of NOC (network on chip) technology in rising scale and complexity chip systems, a Torus structure corresponding route algorithm for is proposed. This improves traditional topology redefines denotations routers. Through redefining router changing original locations, application reconstructed. On basis this structure, dead-lock live-lock free designed according to dimension increase. System C used implement simulated. In four different traffic patterns, average,...

With the development of VDSM, rising scale and complexity system-on-chip induce significant communication challenges in bus based architectures. The interconnect delay unpredictable are gradually becoming bottle neck increasing for on-chip systems. Current NOC (network on chip) provides an effective solution to these problems. In this paper, we study Torus topology bring forward a structure NOC. Besides, propose dead-lock live-lock free route algorithm. During simulation, found that our...

Abstract In recent years, the rapid growth of vehicles has led to a great increase in demand for parking spaces, unmanaged car parks makes it difficult efficiently utilize limited resources. To solve this problem, an intelligent lock system based on Internet things (IoT) is designed and implemented paper. Our design incorporates IoT technology, such as LORA wireless network, carry out real-time monitoring space offer remote control ability lock. The application our smart includes time...

Abstract In complex traffic scenes, accurate identification of pedestrian orientations can help drivers determine trajectories and reduce accidents. However, there are still many challenges in orientation recognition. First, due to the irregular appearance pedestrians, it is difficult for general Convolutional Neural Networks (CNNs) extract discriminative features. addition, more features body parts judge pedestrians. For example, head, arms legs. they usually small not conducive feature...

This paper presents a NoC (network-on-chip) simulation and verification platform (NSVP) based on SystemC. A general node structure is first realized under SystemC, then connected to form the network. NSVP supports an arbitrary size of mesh torus topology, adopts two classic routing algorithms - XY TXY as algorithm. Users also can develop their own network topology algorithm by modifying corresponding modules. Then they verify design loading different traffic patterns run simulation. provides...

In current network-on-chip (NOC) studies and in practical applications, the mesh structure is most widely used deeply researched structure. However, hypercube more symmetrical regular than or torus structures. This paper compares network characteristics of these three direct topologies proposes a method to compress into plane structure, which has multidimensional property based on hypercube, called (MDP) NOC. The compression process divided two steps: transformation router denotations...

Real-time task schedule problem in Chip-Multiprocessor (CMP) receives wide attention recent years. It is partly because the increasing demand for CMP solutions call better algorithm to exploit full potential of hardware, and complexity problem, which itself an NP-hard problem. To address this various heuristics have been studied, among which, Genetic Algorithm (GA), Particle Swarm Optimization (PSO) Simulated Annealing (SA) are most popular ones. In paper, we implement these 3 heuristics,...

A CrosFDH-GA algorithm is proposed for the task scheduling problem on NoC-based MPSoC regarding multicriterion optimization. First of all, four common criterions, namely, makespan, data routing energy, average link load, and workload balance, are extracted from NoC used to construct DEA DMU model. Then FDH analysis applied problem, a cross efficiency formulation derived evaluating relative advantage among schedule solutions. Finally, we introduce approach genetic propose find most efficient...

The Network-on-Chip originated from traditional computer network, and the NOC solution can improve parallel processing computing capacity of current chips. This paper presents a dual-switching mode router which combines circuit-switching method packet-switching method. micro architecture this is introduced, its switching technology presented. Comparisons are made between our (packet-switching) routers. From simulation results, has better delay/throughput performance.

In current China, especially in western provinces, pasture management is largely backward and has low level of automation, intelligent systems are urgently needed to improve efficiency process reduce operating cost. An cloud system based on fuzzy PID control algorithm proposed this paper, which consists platform software, transmission equipment, module information acquisition module. The sensors environment parameters uploaded the server, performed delivered for reasonable effective...

In this paper, a BCC-DPSO scheduling algorithm is proposed to solve multi-objective optimization problem for task on Network-on-Chip (NoC). our proposal, the relative advantage of solution evaluated by calculating its efficiency using BCC model in Data Envelopment Analysis (DEA), and referred-time method introduced rank BCC-efficient solution. Moreover, sub-swarm strategy adopted reduce high computational requirement DEA. There are four sub-swarms, each which optimizes one observed metrics,...

In this paper, a Data Envelopment analysis based Genetic Algorithm (DEA-GA) is proposed for multi-objective scheduling on Chip-Multiprocessor.The proposal adopts modified GA as the searching heuristic to explore solution space, and fitness of each individual (schedule) evaluated using DEA approach.Three schedule metrics, namely makespan, energy load balance are used construct multi-input multi-output Decision Making Units in DEA, BCC super efficiency calculated.In genetic algorithm,...

A novel method to optimize the number of virtual channel buffers is proposed in this paper. More precisely, given application task graph a specific application, an ACO (Ant Colony Optimization) algorithm used during mapping tasks NoC (Network-on-Chip) such that minimized. The benefit our evaluated by simulation and results show can achieve 33% reduction compared state-of-art method.

In this paper, an ADaptive Immune Algorithm (ADIA) based on the artificial immune system (AIS) is proposed for dependent task scheduling Network Chip (NoC).We increase diversity of population AIS in two ways, and improve output result scheduling.On one hand, new calculation method number clones probability mutation are to enlarge search space appropriately.On other our algorithm adopts adaptive strategy enable local drive evolution when speed low after many iterative processes.Moreover,...

In this paper, a hybrid PSO heuristic and an improved solution representation rules are proposed for the real-time task schedule problem on Chip Multiprocessor (CMP). The incorporates Neighbor Search process at final stage of each move in standard PSO, highly improves result optimization. new rule called Load-Balanced SPV, evenly assigns tasks to chip multi-processors according their total loads, produces more balanced than original SPV rule. A comparative performance our proposal is...