A5100378875- Silicon Carbide Semiconductor Technologies
- Advancements in Semiconductor Devices and Circuit Design
- Semiconductor materials and devices
- Electrostatic Discharge in Electronics
- Thin-Film Transistor Technologies
- Electromagnetic Compatibility and Noise Suppression
- Magnetic Field Sensors Techniques
- Induction Heating and Inverter Technology
- Smart Grid Energy Management
- Microgrid Control and Optimization
- Advanced Memory and Neural Computing
- Advanced DC-DC Converters
- Ferroelectric and Negative Capacitance Devices
- Electric Vehicles and Infrastructure
- Adversarial Robustness in Machine Learning
- Lightning and Electromagnetic Phenomena
- Electric Motor Design and Analysis
- Advancements in Battery Materials
- graph theory and CDMA systems
- Advanced ceramic materials synthesis
- Sensor Technology and Measurement Systems
- High voltage insulation and dielectric phenomena
- Nuclear Engineering Thermal-Hydraulics
- Radio Frequency Integrated Circuit Design
- Engineering and Test Systems
University of Electronic Science and Technology of China
2006-2024
Southeast University
2022
National Engineering Research Center of Electromagnetic Radiation Control Materials
2019-2021
Ningbo University
2018
Yibin University
2013
Chinese Academy of Sciences
2011
A novel superjunction (SJ) lateral double-diffused MOSFET ( >950 V) with a thin layer SOI combining the advantage of low specific on-resistance R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on,sp</sub> SJ and high breakdown voltage VB is proposed experimentally demonstrated in this letter. Based on our previously developed equivalent substrate model, optimized endows device respectably reduced without sacrificing V...
This work identifies the Energy Loss Phenomenon in Reinforcement Learning from Human Feedback (RLHF) and its connection to reward hacking. Specifically, energy loss final layer of a Large Language Model (LLM) gradually increases during RL process, with an excessive increase characterizing Beyond empirical analysis, we further provide theoretical foundation by proving that, under mild conditions, increased reduces upper bound contextual relevance LLMs, which is critical aspect hacking as...
A high-voltage silicon-on-insulator lateral insulated-gate bipolar transistor (SOI-LIGBT) with U-shaped channels, which are composed of parallel channels and orthogonal for improving the current density (J <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</sub> ) latch-up immunity, is proposed studied intensively in this paper. By using electron injection from emitter into n-drift region significantly enhanced, improved. In addition, an...
A novel high voltage ultra-thin silicon on insulator (SOI) lateral double diffused metal oxide semiconductor field effect transistor (LDMOS) with a sectional linearly doped drift region is proposed and experimentally realized in this letter. The new device features linear doping (SLD) 0.17 μm SOI layer source plate covering the full region. Low specific on-resistance Ron,sp obtained by increasing local concentration of resistance An analytical model developed to provide design guidance for...
A high voltage SOI-LIGBT with current capability and latch-up immunity is proposed in this paper. The features the segmented U-shaped N <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> emitter `JFET'-region surrounded by channel. channel significantly enhances electron injection from to N-drift region, which leads an improvement on density. Meanwhile, P between adjacent emitters forms additional hole path, beneficial immunity. experiments...
A 1200V 4H-SiC lateral double-diffused MOSFET (LDMOS) featuring a lightly doped P-top layer at the source side, and high-doped N-well arranged between channel is proposed. In order to promote simulation accuracy, Sentaurus Process Tool that can simulate oxidation, ion implantation, annealing, diffusion, etc. used for structure establishment in this letter. ON-state, electric potential end of be modulated lowered due existence layer. The shield voltage from drain which results reduced...
An ultra-low specific on-resistance (R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on, sp</sub> ) high voltage trench SOI LDMOS based on the enhanced bulk field (ENBULF) concept is proposed. The key feature of this new device heavily doped N/P pillars parallel to oxide layer. electric both in dielectric and silicon layer by using pillars. Firstly, highly introduce two peaks drift region, which enhances fields under drain source. Secondly,...
To realize the minimum specific on-resistance R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on, sp</sub> of lateral superjunction (SJ) devices, low resistance characteristic SJ should be adequately used and adverse influence substrate-assisted depletion (SAD) effect on breakdown voltage V xmlns:xlink="http://www.w3.org/1999/xlink">B</sub> eliminated. From our previous equivalent substrate (ES) model, SAD is completely suppressed if ES...
A novel Lateral Double-Diffused MOSFET (LDMOSFET) with ultra-low resistance is investigated by experiments. The proposed LDMOSFET features an extended gate field plate consisting of two back-to-back diodes. In the ON state, electron accumulation layer formed below and greatly reduces drift region. OFF assists in depleting region modulates electric distribution region, which ensures high breakdown voltage (BV). key fabrication process steps for device are given. fabricated prototype shows...
A novel high-voltage interconnection (HVI) structure with dual trenches for 500V SOI-LIGBT is proposed in this paper. Compared the conventional structure, features a shallow trench (T <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sub> ) and deep xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> beneath HVI. By employing ), potential can easily penetrate into total sustained by T increased. The experimental results demonstrate that fully...
A novel snapback-free silicon-controlled rectifier (SFSCR) with P-type Zener implantation (ZP) is developed in a 0.5-μm bipolar CMOS DMOS technology for latch-up immune high-voltage (HV) electrostatic discharge (ESD) protection. The inherent snapback of SCR successfully suppressed by the ZP technique. But, it also brings about serious degradation failure current (I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t2</sub> ) when compared regular...
A lateral double diffused metal oxide semiconductor transistor with the semi-superjunction (semi-SJ LDMOS) is optimized based on normalized current-carrying capability (CC) and experimentally realized in this letter. The device fabricated an equivalent substrate semi-SJ introduced near source. increases local doping concentration N regions meanwhile reduces current path area carrier mobility, resulting variation of CCs before after introduction semi-SJ. CC factor η <sub...
The tridimensional channel SOI-LIGBT on 1.5μm thin SOI layer is developed in this paper. key feature of the device that there are numerous separated P-body cells located emitter region, which can increase efficient width, enhance electron injection and attain a large current capability. proposed exhibits density 150A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , has an improvement 150% compared with conventional structure....
A novel 500-V rated silicon-on-insulator lateral insulated-gate bipolar transistor (SOI-LIGBT), featuring a W-shaped n-typed buffer and p-typed composite collectors, is proposed for the first time in this paper. The collectors which consist of high-doped p+ layer low-doped p- can maintain high level collector-side hole injection ON-state; combining with provides low barrier path electron extraction during turn-off; thus, current capability turn-off speed be realized at same time. measurement...
In this paper, a novel superjunction IGBT with depletion trench (DT SJ IGBT) is proposed and investigated by simulation. the on-state, together gate depletes P-pillar between them thus forms hole barrier to realize an enhanced carrier store effect. Unlike conventional (Con.) IGBT, DT maintains bipolar conducting mode in on-state even high N/P pillar doping of $8 \times 10^{15}\mathrm{cm}^{-3}$. blocking state, shorted P+ emitter then protects corner from being prematurely breakdown. During...
A novel Homogenization Field Technology (HOFT) in lateral power devices is proposed and experimentally proved this letter. By introducing the periodically discrete metal insulator semiconductor (MIS) structure, which realizes periodic equal potential self-charge balance, HOFT obtains almost uniform surface bulk electric field distributions voltage sustaining layer. Therefore, new device harvests both higher breakdown V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML"...
A novel self-modulated superjunction lateral double-diffused MOSFET (SM-SJ LDMOS) is proposed and experimentally realized in this letter. When a SJ introduced into lightly doped N-drift region, the 3-D depletion regions appear surrounding P-pillars. This junction field effect transistor (JFET) decreases current paths both N-pillars N-drift, causing largely increased specific on-resistance R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML"...
A superjunction insulated gate bipolar transistor (SJ-IGBT) featuring a self-adaptive hole-extracting (SAHE) path is proposed and investigated by simulation. The SAHE formed narrow p-type mesa between the two trench gates. In ON-state, depleted gates hole pinched off so as to maintain high injection efficiency, thus low ON-state voltage ( V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> ) achieved. During turn-off period, recovers into...
A novel DTI double RESURF LDMOS with P-sink layer is presented and experimentally demonstrated in this paper. The structure features a around the bottom of deep trench, which formed Deep N-type Well (DNW) after process high temperature driving in. highly doped restrains extension depletion region along horizontal direction, improving isolation performance. According to simulation results, surface electric field peak proposed reduced by 35 % due enhanced effect layer. Meanwhile, concentration...
A novel lateral double-diffused metal-oxide semiconductor (LDMOS) with three-dimensional floating vertical field plate (3-D F-VFP) is proposed in this paper. The 3-D F-VFP LDMOS features a discrete pillar-type VFP array through the N-type drift region and pillars same distance from source are connected to each other realize equal potential. In off-state, potential along pinned by series of equal-potential rings new full-region depletion mode introduced into bulk device. Therefore, highly...
A sub-micron superjunction (SM SJ) device with ultra-low specific on-resistance <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text {on},{sp}}$ </tex-math></inline-formula> is proposed and experimentally realized in this letter. The new features a surface SM SJ mean ion implantation depth of 190 nm bulk curvature effect suppressing layer (CSL) junction notation="LaTeX">$3.7~\mu \text{m}$ . highly...
A novel bulk periodic modulation mechanism for homogenization field (HOF) device is proposed and experimentally demonstrated in this letter. The HOF structure introduces negative charges at the bottom of each discrete MIS trench, providing an additional charge device. leads to increased doping dose lower specific on-resistance <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R</i> <sub xmlns:xlink="http://www.w3.org/1999/xlink">on,sp</sub> ....