Abstract Direct epitaxial growth of III-Vs on silicon for optical emitters and detectors is an elusive goal. Nanowires enable the local integration high-quality III-V material, but advanced devices are hampered by their high-aspect ratio vertical geometry. Here, we demonstrate in-plane monolithic InGaAs nanostructure p-i-n photodetector Si. Using free space coupling, photodetectors a spectral response from 1200-1700 nm. The 60 nm thin devices, with footprints as low ~0.06 μm 2 , provide...

The seamless integration of III-V nanostructures on silicon is a long-standing goal and an important step towards integrated optical links. In the present work, we demonstrate scaled waveguide coupled photodiodes monolithically Si, implemented as InP/In0.5Ga0.5As/InP p-i-n structure. devices show dark current down to 0.048 A/cm2 at -1 V responsivity up 0.2 A/W -2 V. Using grating couplers centered around 1320 nm, observed cutoff frequency f3dB exceeding 70 GHz data reception 50 GBd with OOK...

On-chip optical light sources are key components in photonic integrated circuits and communication. In this paper, we use a novel integration technique called template-assisted selective epitaxy (TASE) to monolithically integrate InP microdisk lasers on silicon. TASE offers several advantages for new device concepts such as lateral doping, dense co-integration of different III-V materials, in-plane with silicon electronics passive components. Here, demonstrate room-temperature lasing from...

Photonic crystal (PhC) cavities are promising candidates for Si photonics integrated circuits due to their ultrahigh quality (Q)-factors and small mode volumes. Here, we demonstrate a novel concept of one-dimensional hybrid III-V/Si PhC cavity which exploits combination standard silicon-on-insulator technology active III-V materials. Using template-assisted selective epitaxy, the central part lattice is locally replaced with gain material. The material placed overlap maximum field profile,...

Recent research on nanowires (NWs) demonstrated the ability of III–V semiconductors to adopt a different crystallographic phase when they are grown as nanostructures, giving rise novel class materials with unique properties. Controlling crystal structure however remains difficult and geometrical constraints NWs cause integration challenges for advanced devices. Here, we report first time phase-controlled growth micron-sized planar InP films by selecting confined planes during...

The vision of microchips that benefits from the high data rates optical links has recently lead to novel concepts for monolithic integration active gain materials on silicon. In this letter, we use template-assisted selective epitaxy (TASE) GaAs microsubstrates silicon, which allows subsequent lattice-matched III-V laser cavities. We demonstrate room-temperature operation optically pumped microdisk-lasers with hexagonal top-facets and diameters as low 1.2 μm. devices exhibit uniform emission...

Metastable wurtzite crystal phases of conventional semiconductors comprise enormous potential for high-performance electro-optical devices, owed to their extended tunable direct band gap range. However, synthesizing these materials in good quality and beyond nanowire size constraints has remained elusive. In this work, the epitaxy InP microdisks related geometries on insulator advanced optical applications is explored. This achieved by an elaborate combination selective area growth fins a...

A key component for optical on-chip communication is an efficient light source. However, to enable low energy per bit and local integration with Si CMOS, devices need be further scaled down. In this work, we fabricate micro- nanolasers of different shapes in InP by direct wafer bonding on Si. Metal-clad cavities have been proposed as means scale dimensions beyond the diffraction limit exploiting hybrid photonic-plasmonic modes. Here, explore size scalability whispering-gallery mode sources...

We present scalable III-V heterojunction tunnel FETs fabricated using a Si CMOS-compatible FinFET process flow and integrated on (100) substrates. The tunneling junction is through self-aligned selective p <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> GaAsSb raised source epitaxial regrowth an InGaAs channel. Similarly, the drain formed by n regrowth. fabrication includes replacement metal gate module, high-k/metal gate, scaled device...

It is a long-standing goal to leverage silicon photonics through the combination of low-cost advanced platform with III-V-based active gain material. The monolithic integration III-V material ultimately desirable for scalable integrated circuits but inherently challenging due large lattice and thermal mismatch Si. Here, we briefly review different approaches while focusing on discussing results achieved using an technique called template-assisted selective epitaxy (TASE), which provides some...

As performance and power consumption of modern micro-chips are increasingly limited by electrical on-chip interconnects, all-optical interconnect systems promise data transmission at speed light wavelength- division multiplexing. To realize complex networks, active devices, like lasers, need to be integrated on Si. III-Vs excellent candidates for optical however, their integration Si is challenging due a significant lattice thermal mismatch. Template-assisted selective epitaxy (TASE) was...

We demonstrate the first local monolithic integration of high-speed III-V p-i-n photodetectors on Si by in-plane epitaxy. Ultra-low capacitance permits data reception at 32Gbps. The approach allows close to electronics enabling future receiverless communication.

As we increasingly move beyond conventional silicon CMOS towards more hybrid technology platforms there is a rising interest in integrating other materials on the Si substrate. Co-integrated III-V could strongly enhance electronic properties by providing increased electron mobility or tunable heterostructures add additional functionality for photonics via integrated direct bandgap [1], [2]. We have developed method monolithic integration Si, where grow material within lithographically...

The vision to speed up on-chip data communication by signal multiplexing using light and the promise reduce energy consumption of interconnects optoelectronic devices has boosted photonics during past years. Silicon is an ideal material for optical waveguides passives, but due indirect band gap it inefficient emitter. Promising techniques integrate III-V on Si were recently reported selective area growth in trenches [1], pre-patterned-grooves [2], template assisted epitaxy (TASE) [3] all...

Local integration of III-V active photonic material on silicon is highly desirable for the dense cointegration electronics and photonics. In this work, we integrate GaAs InP microdisk lasers using template-assisted selective epitaxy (TASE). We demonstrate optically pumped room-temperature lasing from hexagonal microdisks integrated via TASE evaluate their performance at lower temperatures.In order to assess viability TASE, are compared identical devices fabricated developed mature direct...

In this work we will discuss the use of Template-Assisted Selective Epitaxy (TASE) for monolithic in-plane integration active III-V photonic devices on silicon. We show high-speed InGaAs detectors, as well hybrid III-V/Si crystal structures.

We demonstrate the first in-plane waveguide butt-coupled high-speed III-V p-i-n photodetector monolithically integrated on standard SOI and data reception at 50 GBd using OOK a 3 dB cut-off frequency approaching 70 GHz.

III-V semiconductors are ideal for light sources due to their tunable and direct band gap in the telecommunication [1] , [2] but monolithic integration on Si is challenging, because of significant thermal, polarity lattice mismatch. At IBM Research we developed template-assisted selective epitaxy (TASE) [3] [4] where III-Vs nucleate at a confined seed grow within an empty predefined oxide template. Using TASE, InP whispering gallery mode (WGM) lasers emitting ~840nm with comparable...

We have recently developed a novel III-V integration scheme, where material is grown directly on top of Si within oxide nanotubes or microcavities which control the geometry nanostructures. This allows us to grow non-lattice matched any crystalline orientation Si, arbitrary shapes as well abrupt heterojunctions, and gain more flexibility in tuning composition. In this talk, applications for electronic devices such heterojunction tunnel FETs microcavity lasers monolithically integrated will...

We review our work on the direct epitaxy of III-V compounds Si using template-assisted selective (TASE) and demonstrate its use for integration electronic optical devices. The material is grown within confined space given by an oxide template structure lead to a insulator which can be further processed into Monolithic broad range enabled fabrication FETs, TFETs, ballistic devices as well optically pumped microdisk lasers Si.

We report on the control of crystal phase micron-sized planar III-V semiconductor films grown top standard (001) oriented substrates. achieve this by confining MOCVD process using SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> templates and selecting specific growth planes. further characterize InP STEM, PL CL find purities 100% 97% for zinc-blende (ZB) wurtzite (WZ), respectively.

In the present talk we discuss application of Template-Assisted Selective Epitaxy (TASE) for monolithic integration III-V active photonic devices on silicon. The main concept TASE relies guided growth III-Vs within a confined oxide template. At one extremity template there is access to silicon start nucleation, and subsequently it which guides progression. This decoupling resulting geometry from mode substrate orientation, results in larger processing window as no longer rely conditions tune...

In the present talk we discuss development of epitaxial technique Template-Assisted Selective Epitaxy (TASE)and its application for monolithic integration scaled III - V active photonic devices on silicon. A unique advantage TASE silicon photonics applications is that it enables a truly local III-V material at precisely defined positions, therefore particularly suited densely Integrated nanophotonic devices. Here will our work InP-based microdisk lasers fabricated by either direct growth or...

We will present our recent work on III-V micro-cavity lasers monolithically grown silicon substrates. The material is directly using Template-Assisted-Selective-Epitaxy (TASE) within oxide cavities patterned conventional lithographic techniques top of the substrate. This allows for local integration single-crystal active gain material. Two variations this technique be discussed; direct growth disc and two-step approach via a virtual Room temperature single-mode optically pumped lasing...

Due to their high mobility and direct band gap, III-V materials promise good prospects of obtaining novel, high-performance devices for electronic photonic applications. In this paper, two variants the established Template Assisted Selective Epitaxy (TASE) technique [2]-[4] are explored study structural quality GaAs InGaAs microcavities monolithically integrated on Si (001). The first variant involves a one-step cavity growth (DCG), while second relies two-step virtual substrate (VS)...