A5019789647- Radiation Effects in Electronics
- Integrated Circuits and Semiconductor Failure Analysis
- VLSI and Analog Circuit Testing
- Semiconductor materials and devices
- Advancements in Semiconductor Devices and Circuit Design
- Advanced Memory and Neural Computing
- Spacecraft Design and Technology
- Mechatronics Education and Applications
- Low-power high-performance VLSI design
- Satellite Communication Systems
- Experimental Learning in Engineering
- Engineering Education and Pedagogy
- Physical Unclonable Functions (PUFs) and Hardware Security
- Systems Engineering Methodologies and Applications
University of Saskatchewan
2021-2025
Single event upsets (SEUs) are a critical concern for reliability in semiconductor devices, particularly as technology nodes shrink and devices become more susceptible to cosmic rays other radiation sources. Understanding mitigating these effects crucial ensuring the of electronic systems. By leveraging pulsed laser charge injection, researchers can achieve results comparable traditional methods like heavy ion testing but at lower cost with better control over spatial temporal parameters....
Fully-depleted silicon-on-insulator (FDSOI) technology nodes offer better single-event (SE) performance compared with comparable bulk technologies. However, upsets are still possible at nanoscale feature sizes and additional hardening techniques need to be explored. This article presents the upset (SEU) of multiple flip-flop (FF) designs using stacked-transistor technique a 22-nm FDSOI node. Irradiation results show significant reductions in SEU cross sections for stacked-transistor-based...
Because of the isolation transistors, fully depleted silicon-on-insulator (FDSOI) technology nodes have shown better single-event upset (SEU) resilience compared with bulk nodes. Additional radiation-hardening-by-design (RHBD) techniques can further improve SEU performance. In this article, performance multiple RHBD flip-flop (FF) designs using guard-gate (GG) circuit at a 22-nm FDSOI is presented, including conventional FF, GG dual-feedback-recovery (DFR) and GG-dual-interconnected storage...
Total ionizing dose (TID) effects from Co-60 gamma ray and heavy ion irradiation were studied at the 22-nm FD SOI technology node compared with testing results 28-nm technology. Ring oscillators (RO) designed inverters, NAND2, NOR2 gates used to observe output frequency drift current draw. Experimental show a noticeable increased device draw decreases in RO frequencies where ROs have most degradation. As well, functionality of 256 kb SRAM block shift-register chains evaluated during C0-60...
Fully Depleted Silicon on Insulator (FD SOI) technology nodes provide better resistance to single event upsets than comparable bulk technologies, but are still likely occur at nano-scale feature sizes, and additional hardening techniques should be explored. Three flip-flop designs were implemented using Dual Interlocked Cell (DICE) latches in a 22 m FD SOI node. Additional was the layout of each design by transistor spacing interleaving. Comparisons made between standard DICE two other...
Embedded Silicon Germanium (eSiGe) is used in the channel region of PFET devices at 22-nm FD SOI node. The use eSiGe results regions becoming strained, which better hole mobility and increased performance. However, if active diffusion are too short on each side a gate, then effect strain reduced, performance reduced. Continuous Active Diffusion (CnRx) layout construct suggested by foundry way to help keep present within single-cell design. In this article, CnRx implemented test chip soft...
Most common-core first year engineering programs in Canada include an introduction to electric circuits and electromagnetic physics. The launch of the RE-ENGINEERED program at University Saskatchewan has provided opportunity try something different this arena. includes a “spine” circuit analysis related physics that runs through both semesters year.
 modular highly integrated structure allowed for accelerated courses take advantage timely learning other courses. In fall term, students...
A Digital to Analog Converter (DAC) was evaluated by using high energy proton and high/low dose rate <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">60</sup> Co. The DAC remains functional up 40krad(Si). SEFI event observed during testing.
The first is a remote sensing optical payload which will capture grayscale images of the Earth to be used for outreach purposes stemming from project.The second uses novel method monitoring total dosage radiation satellite experiences using floating gate MOSFET devices.Lastly, third blocking by covering electronic components in compounds containing high concentrations amino-acid melanin.