This paper reports theoretical and experimental studies on spatio-temporal dynamics in the choruses of male Japanese tree frogs. First, we theoretically model their calling times positions as a system coupled mobile oscillators. Numerical simulation well calculation order parameters show that exhibits bistability between two-cluster antisynchronization wavy antisynchronization, by assuming frogs are attracted to edge simple circular breeding site. Second, change shape site from circle...

The aging process due to negative bias temperature instability (NBTI) is a key limiting factor of circuit lifetimes in CMOS design. Recent NBTI data exhibits an excessive amount randomness and fast recovery, which are difficult be handled by conventional power-law model (t <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sup> ). Such discrepancies further pose the challenge on long-term reliability prediction under statistical variations...

An efficient inference algorithm for Bayesian neural network (BNN) named BYNQNet, with quadratic activations, and its FPGA implementation are proposed. As networks find applications in mission critical systems, uncertainty estimations become increasingly important. BNN is a theoretically grounded solution to deal by treating parameters as random variables. However, an involves Monte Carlo (MC) sampling, i.e., stochastic forwarding repeated N times randomly sampled parameters, which results...

Random numbers play a vital role in cryptography, where they are used to generate keys, nonce, one-time pads, and initialization vectors for symmetric encryption. The quality of random number generator (RNG) has significant implications on vulnerability performance these algorithms. A pseudo-RNG uses deterministic algorithm produce with distribution very similar uniform. True RNGs (TRNGs), the other hand, use some natural phenomenon/process bits. They nondeterministic, because next be...

A concept of Ising-PUF, a novel PUF structure that utilizes chaotic behavior mutually interacting small PUFs, is proposed. Ising-PUF consists lattice like arrangement each which contains spin register stores the response PUF, also serves as challenge its neighbors. The patterns develop along time determine 1-bit Ising-PUF. Utilizing state-memorizing nature registers, attains hysteresis, i.e., allowing sequence inputs continuously stimulate behavior, provides drastically large...

This paper presents a method that estimates the respiratory rate based on frame capturing of wireless local area networks. The uses beamforming feedback matrices (BFMs) contained in captured frames, which is rotation matrix channel state information (CSI). BFMs are transmitted unencrypted and easily obtained using capturing, requiring no specific firmware or WiFi chipsets, unlike methods use CSI. Such properties allow us to apply various sensing tasks, e.g., vital sensing. In proposed...

Degradations of thousands transistors have been observed in a practical time. A novel device array circuit suitable for measurement-based statistical characterization has devised to facilitate parallel stress bias application capture negative temperature instability (NBTI). The experimental results show that log-normal distributions approximate the distribution power-law exponents very well and variation magnitude threshold voltage shifts bears an inverse relation channel areas transistors....

A deep neural network named PUFNet is proposed, which reveals the unreported threats to device authentication systems based on physically unclonable functions (PUFs). We demonstrates that, by employing novel techniques developed in learning community, such as ReLU activation function and Xavier initialization technique, successfully predicts responses of double-arbiter PUF (DAPUF) unseen challenges with probability 88.4%, 21.1% higher than conventional method. Those results highlight an...

A transistor array has been developed that is capable of efficiently collecting parametric data for a statistical model bias-temperature instability (BTI) degradation. This BTIarray uses time-overlapping technique, in which all transistors the undergo BTI stress or recovery bias parallel, greatly reduces measurement time large number transistors. An implementation using 65-nm technology validated concept. The use this to measure threshold voltage shifts 128 from month within day while...

As technology further scales semiconductor devices, aging-induced device degradation has become one of the major threats to reliability. In addition, aging mechanisms like negative bias temperature instability (NBTI) is known be sensitive workload (i.e., signal probability) that hard assumed at design phase. this work, we analyze dependence NBTI using a processor, and propose novel technique estimate worst-case paths. our approach, with careful examination, exploit fact deterministic nature...

Hyper-Dimensional (HD) computing is a brain-inspired learning approach for efficient and fast on today's embedded devices. HD first encodes all data points to high-dimensional vectors called hypervectors then efficiently performs the classification task using well-defined set of operations. Although achieved reasonable performances in several practical tasks, it comes with huge memory requirements since point should be stored very long vector having thousands bits. To alleviate this problem,...

Bias temperature instability (BTI) is the dominant source of aging in nanoscale transistors. Recent works show role charge trapping/de-trapping (T-D) BTI through discrete V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> shifts, with degradation exhibiting an excessive amount randomness. Furthermore, modern circuits employ dynamic voltage scaling (DVS) where xmlns:xlink="http://www.w3.org/1999/xlink">dd</sub> tuned, complicating effect....

Aging mechanisms, such as Negative Bias Temperature Instability (NBTI), limit the lifetime of CMOS design. Recent NBTI data exhibits an excessive amount randomness and fast recovery, which are difficult to be handled by conventional power-law model (t <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sup> ). Such discrepancies further pose challenge on long-term reliability prediction in real circuit operation. To overcome these barriers, this...

Widely distributed sensors, in the IoT era, are vulnerable to attacks, including data sniffing and spoofing. Tamper resistance, encryption authentication, which essential aspects of security all devices, becoming ever more critical. We have proposed an Analog-to-Digital Conversion scheme, based on slope A/D conversion, involving two randomized slopes, realize resistance side channel attacks perform encryption-authentication during conversion process. designed fabricated unified ADC 0.18μm...

This paper presents a new analysis method for estimating the statistical parameters of random telegraph noise (RTN). RTN is characterized by time constants carrier capture and emission, associated changes threshold voltage. Because trap activities are projected on to voltage, separation amplitude each an ill-posed problem. The proposed solves this problem that can reflect physical generation process RTN. By using Gibbs sampling algorithm developed in machine learning community, we decompose...

Random telegraph noise (RTN) is a phenomenon that considered to limit the reliability and performance of circuits using advanced devices. The time constants carrier capture emission associated change in threshold voltage are important parameters commonly included various models, but their extraction from time-domain observations has been difficult task. In this study, we propose statistical method for simultaneously estimating interrelated parameters: magnitude shift. Our based on graphical...

Voltage scaling is one of the most promising approaches for energy efficiency improvement but also brings challenges to fully guaranteeing stable operation in modern VLSI. To tackle such issues, we propose DependableHD, a learning framework based on HyperDimensional Computing (HDC), which supports systems tolerate bit-level memory failure low voltage region with high robustness. For first time, DependableHD introduces concept margin enhancement model retraining and utilizes noise injection...

Many animals use sounds produced by conspecifics for mate identification. Female insects and anuran amphibians, instance, acoustic cues to localize, orient toward approach conspecific males prior mating. Here we present a novel technique that utilizes multiple, distributed sound-indication devices miniature LED backpack visualize record the nocturnal phonotactic of females Australian orange-eyed tree frog (Litoria chloris) both in laboratory arena animal's natural habitat. Continuous...

We implemented pseudo-linear feedback shift-register-based physical unclonable functions (PL-PUFs) on silicon and analyzed their performances in terms of reproducibility, uniqueness, resistance to machine-learning attacks. A PL-PUF is compact high-throughput PUF, slightly oversensitive voltage fluctuations. To overcome this drawback, we developed a capturing signal generation circuit that was tolerant the reproducibility degradation caused by supply changes. also Built-In Self-Test (BIST)...

A resource efficient hardware accelerator for Bayesian neural network (BNN) named B2N2, Bernoulli random number based accelerator, is proposed. As networks expand their application into risk sensitive domains where mispredictions may cause serious social and economic losses, evaluating the NN's confidence on its prediction has emerged as a critical concern. Among many uncertainty evaluation methods, BNN provides theoretically grounded way to evaluate of output by treating parameters...

A 256-bit F <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">p</sub> elliptic curve digital signature algorithm (ECDSA) cryptoprocessor featuring low latency, energy consumption, and the ability to change parameters is designed fabricated in a 65-nm silicon on thin buried oxide (SOTB) CMOS process. We have demonstrated lowest ever reported signature-generation time of 31.3 μs. Energy consumption 3.28 μJ/signature-generation, which same as date.