ABSTRACT A structure for a low input impedance current buffer transimpedance amplifier (CBTIA) is presented, which holds great potential flexible bioelectronic applications requiring high linearity sensing and transmission. Based on this structure, tunable CBTIA circuits are implemented. The former utilizes sink mode, where the voltage at drain of common gate transistor fed back to in order achieve impedance. self‐biasing optimization (SBO) technique proposed self‐regulation headroom each...

In this paper, a high gain amplifier with phase compensation loop is presented. A structure of parallel gate cross-coupled transistors to both ends differential pair drain and source designed improves the load impedance, which obtains sufficient further reduces power consumption. novel capacitor bootstrap circuit proposed. The topology constructed by resistance transistor working in cut-off region, where parasitic rather than existing series structure, thereby only small required. By...

Supercapacitors (SCs) are widely recognized as competitive power sources for energy storage. The hierarchical structure of nickel vanadium sulfide nanoparticles encapsulated on graphene nanosheets (NVS/G) was fabricated using a cost-effective and scalable solvothermal process. reaction contents the composites were explored optimized. TEM images displayed (NVS NPs) with 20-30 nm average size anchored to nanosheets. interconnection encapsulating NVS effectively reduces ion diffusion path...

As a key component of the drilling mud pump, plunger seal often has problems such as failure in reconstruction low-permeability sandstone reservoirs and development unconventional reservoirs, which, turn, leads to low efficiency pumps even great potential safety hazard. Based on this, this paper designs three-stage sealing device at hydraulic head for 7000 fracturing analyzes performance system. The effects different working loads axial pre-tightening force contact ring stress distribution...

A compact low-power current-mode LNA-Mixer with current-reuse architecture used for RF receiving applications is presented. The mixer reuses the current of LNA directly to get further minimization on power consumption, complexity and area, making acting as a single circuit. NF improved by using capacitive cross-couple structure cooperating noise suppression inductors. And single-ended voltage signal converted differential so improve common-mode rejection ratio. Different from voltage-mode...

This work outperforms the previous literatures by proposing a delay-cell-controlled voltage control oscillator (VCO) design for common unipolar, single-gate, and enhancement-mode thin-film transistor (TFT) technologies. A example with InZnO TFTs is simulated to verify proposed design. The has 500 μW power consumption, 0.7 mm2 area, 3.8 kHz-8 kHz output frequency range, 600 Hz/V tuning sensitivity, 4% maximum linear error. may have potential be used flexible, low cost, moderate speed sensor...

In this article, an effective approach for human detection indoors with suppression of leakage and background clutters in the frequency-modulated continuous-wave (FMCW) radar systems is detailed. We constantly collect advance, which then processed by dynamic averaging. Afterwards, proposed digital frequency domain technology, performs fast Fourier transform(FFT) on collected data takes modulo subtraction, used to determine presence target suppress clutters. Within adaptive threshold based...

To satisfy the different radiated power requirements for ultra-wideband (UWB) data transmitting in implantable electronic devices or wireless component interconnections, a novel low-power high-speed UWB transmitter with tuning was proposed. The tunable is achieved by RF buffer peak value controller. designed low-complex narrow pulse generator and digital ring on–off VCO ensure high speed transmitting. low realized using subtractor to eliminate base-band from output of making operating...

A novel low-complexity ultra-wideband UWB receiver is proposed for short-range wireless transmission communications without considering multipath effect. The chip uses a non-coherent receiving system solution with the core module composed of squarer and low-pass filter. By introducing asymmetric gate series inductance RCL parallel negative feedback loop into two-stage push–pull amplifier, low-noise amplification input impedance matching at ultra-wide bandwidth were achieved. With only two...

A novel binary phase-shift keying (BPSK) demodulator architecture is presented. By using fully digital and trigger receiving method, the proposed can work properly at a wide speed range hence be applied in different applications such as wireless communications, biological implants portable facilities, etc. The was implemented by 0.35-μm complementary metal-oxide-semiconductor (CMOS) process chip area about 0.5 mm2. Measurement results reveal that successfully demodulate 100 MHz/10 Mbps BPSK...

In this paper, a non-coherent UWB front-end receiver chip is proposed to operate under 1.8V supply voltage in standard 0.18um RF CMOS technology, at the licensed 3~5GHz band, suppose of UWB-NFC transmission channel model without multi-path. A receiving solution adopted realize low-complexity and high-speed physical implementation for future high data rate NFC applications. The final includes input matching wide-band range, small noise figure (NF) excellent PSRR performance by introducing...

This paper proposes a fully integrated low dropout regulator (LDO) with fast transient response capability without the need of external off-chip capacitors. Based on traditional LDO, two inverters are inserted between gate PMOS and output stage error amplifier. At steady state inverter increases line load regulation because it acts as gain stage. state, provides discharge or charge path to transistor. Fast charging discharging greatly increase slew rate gate, thereby effectively reducing...

Abstract In this paper, a harmonic distortion measurement algorithm and its system design based on time-domain matrix operations are proposed, which can quickly calculate the amplitudes, phases total of signal. To realize calculation signal parameters in time domain, we proposed method to convert nonlinear function representing into linear function, constructed equation, solved equation by row transformation method, significantly reduced complexity algorithm. Finally, algorithm, was...

A multi-access ultra-wideband (UWB) transmitter with waveform division multiple access (WDMA) mode is proposed for 3-5GHz applications. WDMA divides different users by controlling the combination of two orthogonal waveforms according to pseudo random code. low-power all-digital employed implement couple Gaussian pulses achieve high spectrum efficiency under FCC limitation floor. The data modulation circuit was designed 180nm CMOS process. Simulation results show that transmitted signal has...

Depthwise separable convolution (DSC) is an efficient convolutional neural network (CNN) structure that can reduce computation and parameter amounts while maintaining high accuracy. However, due to the processing capability, memory, bandwidth limitations of embedded processors, performance DSC still affected. To solve this problem, paper proposes a coprocessor designed for which effectively accelerate execution power consumption memory overhead. The adopts following optimization strategies....