A5002961072- Advanced Memory and Neural Computing
- EEG and Brain-Computer Interfaces
- Neuroscience and Neural Engineering
- Ferroelectric and Negative Capacitance Devices
- Neural dynamics and brain function
- CCD and CMOS Imaging Sensors
- Analog and Mixed-Signal Circuit Design
- Wireless Body Area Networks
- ECG Monitoring and Analysis
- Engineering and Test Systems
- Neural Networks and Applications
- Advanced Data Processing Techniques
- Distributed and Parallel Computing Systems
- Advanced Sensor and Energy Harvesting Materials
- Simulation Techniques and Applications
- Tactile and Sensory Interactions
- Particle Detector Development and Performance
- Context-Aware Activity Recognition Systems
- Neural and Behavioral Psychology Studies
- Sleep and Wakefulness Research
- Real-time simulation and control systems
- Molecular Communication and Nanonetworks
- Parallel Computing and Optimization Techniques
- Cognitive Science and Mapping
- Advanced Neural Network Applications
La Jolla Bioengineering Institute
2019-2023
University of California, San Diego
2007-2023
Jacobs (United States)
2019
Stanford Synchrotron Radiation Lightsource
1981-2018
Stanford University
1981-2018
SLAC National Accelerator Laboratory
1981-2018
Abstract Realizing increasingly complex artificial intelligence (AI) functionalities directly on edge devices calls for unprecedented energy efficiency of hardware. Compute-in-memory (CIM) based resistive random-access memory (RRAM) 1 promises to meet such demand by storing AI model weights in dense, analogue and non-volatile RRAM devices, performing computation within RRAM, thus eliminating power-hungry data movement between separate compute 2–5 . Although recent studies have demonstrated...
Owing to the proximity of ear canal central nervous system, in-ear electrophysiological systems can be used unobtrusively monitor brain states. Here, by taking advantage ear's exocrine sweat glands, we describe an integrated array electrochemical and sensors placed on a flexible substrate surrounding user-generic earphone for simultaneous monitoring lactate concentration states via electroencephalography, electrooculography electrodermal activity. In volunteers performing acute bout...
Typical electroencephalogram (EEG) and electrocardiogram (ECG) sensors require conductive gel to ensure low-impedance electrical contact between the sensor skin, making set-up time-consuming long-term recording problematic. We present a gel-free, non-contact EEG/ECG with on-board electrode that capacitively couples skin. Active shielding of high-impedance input significantly reduces noise pickup, variations in gain as function gap distance. The integrated combines amplification, bandpass...
Many powerful neural network (NN) models such as probabilistic graphical (PGMs) and recurrent networks (RNNs) require flexibility in dataflow weight access patterns shown Fig. 33.1.1 Typically, Compute-In-Memory (CIM) designs do not implement dataflows or so by replicating circuits at the memory periphery ADCs/neurons along both rows columns of array, leading to an overhead operation. This paper describes a CIM architecture implemented 130nm CMOS/RRAM process, that delivers highest reported...
A non-contact capacitive biopotential electrode with a common-mode noise suppression circuit is presented. The sensor network utilizes single conductive sheet to establish common body wide reference line, eliminating the need for an explicit signal ground connection. Each senses local differential gain of 46 dB over 1-100 Hz bandwidth. Signals are digitized directly on board 16-bit ADC. coin sized consumes 285 ¿A from 3.3 V supply, and interfaces serial data bus daisy-chain integration in...
To enable continuous, mobile health monitoring, body-worn sensors need to offer comparable performance clinical devices in a lightweight, unobtrusive package. This work presents complete versatile wireless electrophysiology data acquisition system (weDAQ) that is demonstrated for in-ear electroencephalography (EEG) and other on-body with user-generic dry-contact electrodes made from standard printed circuit boards (PCBs). Each weDAQ device provides 16 recording channels, driven right leg...
Electroencephalograph (EEG) recording systems offer a versatile, non-invasive window on the brain's spatiotemporal activity for many neuroscience and clinical applications. Our research aims to improve convenience mobility of EEG by eliminating need conductive gel creating sensors that fit into scalable array architecture. The drycontact electrodes are created with micro-electrical-mechanical system (MEMS) technology. Each channel our analog signal processing front-end comes custom-built,...
Sleep spindles and K-complexes (KCs) define stage 2 NREM sleep (N2) in humans. We recently showed that KCs are isolated downstates characterized by widespread cortical silence. demonstrate here can be quasi-synchronous across scalp EEG much of the cortex using electrocorticography (ECOG) localized transcortical recordings (bipolar SEEG). examine mechanism synchronous KC production creating first conductance based thalamocortical network model N2 to generate both spontaneous KCs. Spontaneous...
Spike-Timing-Dependent Plasticity (STDP) is a bio-inspired local incremental weight update rule commonly used for online learning in spike-based neuromorphic systems. In STDP, the intensity of long-term potentiation and depression synaptic efficacy (weight) between neurons expressed as function relative timing pre- post-synaptic action potentials (spikes), while polarity change dependent on order (causality) spikes. Online STDP updates causal acausal spike times are activated at onset post-...
Clinical assessment of the human auditory system is an integral part evaluating health a patient's cognitive processes. Conventional tests performed by audiologists include Auditory Steady State Response (ASSR) and Brainstem (ABR), both which present audio stimulus to patient in order elicit change brain state measurable electroencephalography (EEG) techniques. Spatial monitoring electrophysiological activity cortex, temporal stem during evaluation can be used pinpoint location dysfunction...
Conventional electroencephalography (EEG) requires placement of several electrode sensors on the scalp and, accompanied by lead wires and bulky instrumentation, makes for an uncomfortable experience. Recent efforts in miniaturization system integration have enabled smaller systems, such as wearable, in-ear EEG devices that are gaining popularity their unobtrusive form factor. Although has been demonstrated recent works, dynamics ear canal directly affect electrophysiological measurements...
Electroencephalograph (EEG) recording systems offer a versatile, noninvasive window on the brain's spatio-temporal activity for many neuroscience and clinical applications. Our research aims at improving spatial resolution mobility of EEG by reducing form factor, power drain signal fanout acquisition node in scalable sensor array architecture. We present such integrated onto dimesized circuit board that contains sensor's complete processing front-end, including amplifier, filters,...
In order for neuromorphic computing to attain full throughput capacity, its hardware design must mitigate any inefficiencies that result from limited bandwidth neural and synaptic information. large-scale systems, memory access is typically the defining bottleneck, demanding system closely analyze interdependence between functional blocks keep as active possible. this paper, we formulate principles in organization of digital spiking networks, with a focus on systems High Bandwidth Memory...
Realizing today's cloud-level artificial intelligence functionalities directly on devices distributed at the edge of internet calls for hardware capable processing multiple modalities sensory data (e.g. video, audio) unprecedented energy-efficiency. AI architectures today cannot meet demand due to a fundamental "memory wall": movement between separate compute and memory units consumes large energy incurs long latency. Resistive random-access (RRAM) based compute-in-memory (CIM) promise bring...
We present an efficient and scalable partitioning method for mapping large-scale neural network models with locally dense globally sparse connectivity onto reconfigurable neuromorphic hardware. Scalability in computational efficiency, i.e., amount of time spent actual computation, remains a huge challenge very large networks. Most algorithms also struggle to address the scalability workloads finding optimal partition efficiently As communication is regarded as most energy time-consuming part...
To enable continuous, mobile health monitoring, body worn sensors need to offer comparable performance clinical devices in a lightweight, unobtrusive package. This work presents complete wireless electrophysiology data acquisition system (weDAQ) that is demonstrated for in-ear EEG with user-generic dry-contact electrodes made from standard printed circuit boards (PCBs). Each weDAQ device supports 16 channels, driven right leg, impedance scanning, 3-axis accelerometer data, local storage,...
The architecture, adaptability and performance of SLAC's single board controller module will be detailed. Example uses with an 8086 MPU a 68000 given. Details circuit design software interface provided.
A multi-chip analog neural network system capable of prototyping networks with as many 81920 synaptic connections and 1024 neurons is described. The architecture reconfigurable by routing all neuron activation values through a host computer which can re-map the connectivity changing look-up table in memory. Once successfully prototyped, it hardwired embedded an application to take full advantage performance that electrically trainable (ETANN) chips provide. multi-layer, containing 12660...
The FASTBUS System Manager software that was designed and implemented on an LSI-ll system using PASCAL is described. Particular attention given to the file structures, access mechanisms, basic routing algorithms. Portability other machines languages
Biological systems which inspire connectionist architecture are based upon axonal point to connections. As we attempt engineer ever larger analogues of these neural networks forced multiplex signals over time shared paths. This can alter the timing signal arrival is critical in oscillatory and leads bandwidth-synchrony dilemma. paper further describes problem, especially for analog VLSI systems, approaches under consideration solution.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML"...
This paper will provide a demonstration of basic FASTBUS hardware and test software. The systems include single crate segments, simple computer I/O, fast sequencer memory, some diagnostic display devices UNIBUS to processor interface. equipment be set up show the protocols timing transactions, as well general initialization software features.
We present an efficient and scalable partitioning method for mapping large-scale neural network models to reconfigurable neuromorphic hardware. The framework is optimized compute-balanced, memory -efficient parallel processing targeting low-latency execution dense synaptic storage, with minimal routing across various compute cores. demonstrate highly connectivity-aware hierarchical address-event resource-optimized mapping, significantly reducing the total communication volume recursively...