This paper presents a low-power, high-bandwidth wireline transceiver for chiplet. The uses new technology of correlated non-return to zero (CNRZ) improve the pin efficiency and reduce noise common mode crosstalk (CMN XTALK). transmitter adopts 4:1 multiplexer (MUX) special voltage-mode driver [source series terminated (SST)] power efficiency. receiver utilizes low jitter clock-and-data alignment (CDA) based on high resolution phase interpolator (PI) MINI-PLL with differential filter...

The disasters may cause multiple fiber failures, resulting in serious network capacity loss. This makes it difficult to provide enough spectrum resources for the massive unexpectedly interrupted services recovery, which requires more efficient algorithm make better use of remaining improve survivability elastic optical (EON). Since service flow is recovered first has impact on total recovery ratio, this paper proposed an ordering aware with routing modulation and assignment (OASR-RMSA), used...

With the increasing maturity of power Internet things (pIoT), radio frequency identification technology (RFID), is more applied to fault monitoring equipment, which temperature equipment one focuses monitoring. When traditional RFID measurement tag high-voltage electrical it often produces metallic interference antenna because attached surface metal conductor, such as large synchronous machine and transmission line, greatly shortens range on even cannot work normally. To solve problems...

In this letter, we propose a novel high-gain four-level pulse amplitude modulation (PAM4) baud-rate phase detector (BRPD) for the ADC-based high-speed clock and data recovery (CDR) circuit. The PAM4 decisions are generated by three adjacent error types. addition, linear model of proposed BRPD is developed first time to precisely calculate gain, which also critical analyzing key characteristics BRPD-based CDR. Moreover, such CDR designed with 12nm CMOS technology supplied 0.8 voltage....

Present optical transmission communication network which supporting stability control services in the power system cannot meet requirements of real-time, cross-regional wide-area safety and control, it is necessary to plan new links between regions on basis existing networks. In order ensure that extension can satisfy low latency high economic needs, an optimal planning approach proposed, considers both construction cost average inter-regional communication, moreover, interconnection...

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This paper presents a fully digital background calibration method for time-interleaved (TI) analog-to-digital converters (ADCs). The timing detector employs detection based on an enhanced autocorrelation function, combined with matrix operations, to improve the accuracy of mismatch acquisition. algorithm makes full use functions each channel and proposes more precise obtaining derivatives. Furthermore, features simple structure, low computational complexity, can support any number channels...

This paper presents a fully digital background calibration method for time-interleaved (TI) analog-to-digital converters (ADCs). The timing detector employs detection based on an enhanced autocorrelation function, combined with matrix operations, to improve the accuracy of mismatch acquisition. algorithm makes full use functions each channel and proposes more precise obtaining derivatives. Furthermore, features simple structure, low computational complexity, can support any number channels...

Aqueous pseudocapacitive storage has shown promise in future energy techniques, but it suffers from the single reaction pathway and mechanism that restrains performance breakthrough, especially under commercially high-mass-loading conditions....

As the PCIe 6.0 specification places higher requirements on signal integrity and transmission latency, it becomes especially important to improve performance at physical layer of transceiver interface. Retimer circuits are a key component high-speed serial interfaces, their delay jitter size directly affect overall PCIe. For typical retimer circuit with large-latency low-jitter performance, this paper proposes low-latency based CDR + PLL architecture for 6.0, using jitter-canceling filter...

This paper proposes a frequency domain model for injection-locked LC oscillators by introducing the impulse sensitivity function (ISF) and injection factor, analyzes effect of pulse width position on oscillator performance based this model, derives an equation that can guide design optimization oscillators. The fills gap in field models Based above clock generator circuit structure operating at 14 GHz, combining phase-locked loop with oscillator, is designed measured 65-nm cmos process....

This paper analyzes the performance requirements that need to be met by a clock generator applied low-temperature quantum computer and negative effects on circuit under conditions. In order meet proposed in this suppress brought about low temperature, for ultra-low-temperature computing is designed. designed using F-CLASS Voltage Controlled Oscillator (VCO), power filter, tail resistor, differential charge pump, other techniques. And noise characteristics of are analyzed Impulse Sensitive...

A novel high-speed transceiver based on 7 bit correlated non-return-to-zero(CNRZ-7) with high-bandwidth-density(bandwidth per unit length) and low-power for Die-to-Die(D2D) communication is proposed. In order to further improve the SNR bandwidth of CNRZ-5 in D2D communication, a CNRZ-7 transmitter matrix receiver are proposed firstly, which derived from Walsh Hadamard(W-H) transform inverse transformation. addition, reduce power consumption transmitter, encoding driver designed source series...

This paper proposes a multichannel and high-bandwidth (BW) receiver for standard packaging die-to-die (D2D) interconnects. The adopts forward clock (FCK) architecture of the high-density transmission standard, which consists 16 high-speed data paths pair low-speed differential clocks 512 Gbps BW. To reduce chip area power consumption, common minimal phase-locked loop (MINI-PLL) adjustment (CDA) circuit to replaces recovery (CDR) in traditional receiver. A delay-matching is adopted combat PVT...

Aiming at the significant demand of GEI in ultra high voltage(UHV),ubiquitous smart grid, use regenerative clean energy, paper presents a new sky-earth collaborative information communication network architecture which delivers centralized and distributed power, wind solar ocean energy other renewable to global users.In order ensure wide service range, strong configuration ability, safe reliable, green low-carbon allocation GEI, it also system studies topological structure, layered protocol...

The magnetic levitation system is nonlinear and inherently unstable. In order to improve its anti-interference performance loading capacity, a robust H ∞ controller designed based on the theory. selection of weighting function matrix discussed for both sensitivity complementary controller. Simulation experimental results show that works effectively with excellent precision robustness.